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0ef8f3189e
PPC has an instruction for ctlz with defined zero behavior, and our lowering of cttz (provided by DAGCombine) is also efficient and branchless, so speculating these makes sense. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225150 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.3 KiB
LLVM
42 lines
1.3 KiB
LLVM
; RUN: opt -S -codegenprepare < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define i64 @test1(i64 %A) {
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; CHECK-LABEL: @test1(
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; CHECK: [[CTLZ:%[A-Za-z0-9]+]] = call i64 @llvm.ctlz.i64(i64 %A, i1 false)
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; CHECK-NEXT: ret i64 [[CTLZ]]
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entry:
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%tobool = icmp eq i64 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
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ret i64 %cond
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}
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define i64 @test1b(i64 %A) {
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; CHECK-LABEL: @test1b(
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; CHECK: [[CTTZ:%[A-Za-z0-9]+]] = call i64 @llvm.cttz.i64(i64 %A, i1 false)
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; CHECK-NEXT: ret i64 [[CTTZ]]
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entry:
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%tobool = icmp eq i64 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
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ret i64 %cond
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}
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declare i64 @llvm.ctlz.i64(i64, i1)
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declare i64 @llvm.cttz.i64(i64, i1)
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