mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-12 17:32:19 +00:00
8fc3ffbb74
Load instructions are inserted into loop preheaders when sinking stores and later removed if not used by the SSA updater. Avoid sinking if the loop has no preheader and avoid crashes. This fixes one more side effect of not handling indirectbr instructions properly on LoopSimplify. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223119 91177308-0d34-0410-b5e6-96231b3b80d8
398 lines
9.8 KiB
LLVM
398 lines
9.8 KiB
LLVM
; RUN: opt < %s -basicaa -licm -S | FileCheck %s
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declare i32 @strlen(i8*) readonly
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declare void @foo()
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; Sink readonly function.
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define i32 @test1(i8* %P) {
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br label %Loop
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Loop: ; preds = %Loop, %0
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%A = call i32 @strlen( i8* %P ) readonly
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br i1 false, label %Loop, label %Out
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Out: ; preds = %Loop
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ret i32 %A
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; CHECK-LABEL: @test1(
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; CHECK: Out:
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; CHECK-NEXT: call i32 @strlen
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; CHECK-NEXT: ret i32 %A
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}
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declare double @sin(double) readnone
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; Sink readnone function out of loop with unknown memory behavior.
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define double @test2(double %X) {
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br label %Loop
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Loop: ; preds = %Loop, %0
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call void @foo( )
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%A = call double @sin( double %X ) readnone
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br i1 true, label %Loop, label %Out
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Out: ; preds = %Loop
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ret double %A
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; CHECK-LABEL: @test2(
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; CHECK: Out:
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; CHECK-NEXT: call double @sin
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; CHECK-NEXT: ret double %A
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}
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; This testcase checks to make sure the sinker does not cause problems with
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; critical edges.
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define void @test3() {
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Entry:
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br i1 false, label %Loop, label %Exit
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Loop:
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%X = add i32 0, 1
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br i1 false, label %Loop, label %Exit
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Exit:
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%Y = phi i32 [ 0, %Entry ], [ %X, %Loop ]
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ret void
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; CHECK-LABEL: @test3(
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; CHECK: Exit.loopexit:
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; CHECK-NEXT: %X.le = add i32 0, 1
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; CHECK-NEXT: br label %Exit
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}
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; If the result of an instruction is only used outside of the loop, sink
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; the instruction to the exit blocks instead of executing it on every
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; iteration of the loop.
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;
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define i32 @test4(i32 %N) {
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Entry:
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br label %Loop
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Loop: ; preds = %Loop, %Entry
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%N_addr.0.pn = phi i32 [ %dec, %Loop ], [ %N, %Entry ]
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%tmp.6 = mul i32 %N, %N_addr.0.pn ; <i32> [#uses=1]
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%tmp.7 = sub i32 %tmp.6, %N ; <i32> [#uses=1]
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%dec = add i32 %N_addr.0.pn, -1 ; <i32> [#uses=1]
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%tmp.1 = icmp ne i32 %N_addr.0.pn, 1 ; <i1> [#uses=1]
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br i1 %tmp.1, label %Loop, label %Out
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Out: ; preds = %Loop
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ret i32 %tmp.7
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; CHECK-LABEL: @test4(
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; CHECK: Out:
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; CHECK-NEXT: %[[LCSSAPHI:.*]] = phi i32 [ %N_addr.0.pn
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; CHECK-NEXT: mul i32 %N, %[[LCSSAPHI]]
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; CHECK-NEXT: sub i32 %tmp.6.le, %N
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; CHECK-NEXT: ret i32
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}
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; To reduce register pressure, if a load is hoistable out of the loop, and the
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; result of the load is only used outside of the loop, sink the load instead of
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; hoisting it!
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;
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@X = global i32 5 ; <i32*> [#uses=1]
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define i32 @test5(i32 %N) {
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Entry:
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br label %Loop
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Loop: ; preds = %Loop, %Entry
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%N_addr.0.pn = phi i32 [ %dec, %Loop ], [ %N, %Entry ]
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%tmp.6 = load i32* @X ; <i32> [#uses=1]
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%dec = add i32 %N_addr.0.pn, -1 ; <i32> [#uses=1]
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%tmp.1 = icmp ne i32 %N_addr.0.pn, 1 ; <i1> [#uses=1]
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br i1 %tmp.1, label %Loop, label %Out
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Out: ; preds = %Loop
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ret i32 %tmp.6
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; CHECK-LABEL: @test5(
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; CHECK: Out:
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; CHECK-NEXT: %tmp.6.le = load i32* @X
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; CHECK-NEXT: ret i32 %tmp.6.le
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}
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; The loop sinker was running from the bottom of the loop to the top, causing
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; it to miss opportunities to sink instructions that depended on sinking other
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; instructions from the loop. Instead they got hoisted, which is better than
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; leaving them in the loop, but increases register pressure pointlessly.
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%Ty = type { i32, i32 }
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@X2 = external global %Ty
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define i32 @test6() {
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br label %Loop
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Loop:
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%dead = getelementptr %Ty* @X2, i64 0, i32 0
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%sunk2 = load i32* %dead
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br i1 false, label %Loop, label %Out
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Out: ; preds = %Loop
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ret i32 %sunk2
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; CHECK-LABEL: @test6(
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; CHECK: Out:
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; CHECK-NEXT: %dead.le = getelementptr %Ty* @X2, i64 0, i32 0
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; CHECK-NEXT: %sunk2.le = load i32* %dead.le
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; CHECK-NEXT: ret i32 %sunk2.le
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}
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; This testcase ensures that we can sink instructions from loops with
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; multiple exits.
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;
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define i32 @test7(i32 %N, i1 %C) {
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Entry:
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br label %Loop
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Loop: ; preds = %ContLoop, %Entry
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%N_addr.0.pn = phi i32 [ %dec, %ContLoop ], [ %N, %Entry ]
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%tmp.6 = mul i32 %N, %N_addr.0.pn
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%tmp.7 = sub i32 %tmp.6, %N ; <i32> [#uses=2]
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%dec = add i32 %N_addr.0.pn, -1 ; <i32> [#uses=1]
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br i1 %C, label %ContLoop, label %Out1
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ContLoop:
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%tmp.1 = icmp ne i32 %N_addr.0.pn, 1
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br i1 %tmp.1, label %Loop, label %Out2
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Out1: ; preds = %Loop
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ret i32 %tmp.7
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Out2: ; preds = %ContLoop
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ret i32 %tmp.7
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; CHECK-LABEL: @test7(
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; CHECK: Out1:
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; CHECK-NEXT: %[[LCSSAPHI:.*]] = phi i32 [ %N_addr.0.pn
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; CHECK-NEXT: mul i32 %N, %[[LCSSAPHI]]
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; CHECK-NEXT: sub i32 %tmp.6.le, %N
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; CHECK-NEXT: ret
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; CHECK: Out2:
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; CHECK-NEXT: %[[LCSSAPHI:.*]] = phi i32 [ %N_addr.0.pn
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; CHECK-NEXT: mul i32 %N, %[[LCSSAPHI]]
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; CHECK-NEXT: sub i32 %tmp.6.le4, %N
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; CHECK-NEXT: ret
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}
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; This testcase checks to make sure we can sink values which are only live on
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; some exits out of the loop, and that we can do so without breaking dominator
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; info.
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define i32 @test8(i1 %C1, i1 %C2, i32* %P, i32* %Q) {
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Entry:
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br label %Loop
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Loop: ; preds = %Cont, %Entry
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br i1 %C1, label %Cont, label %exit1
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Cont: ; preds = %Loop
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%X = load i32* %P ; <i32> [#uses=2]
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store i32 %X, i32* %Q
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%V = add i32 %X, 1 ; <i32> [#uses=1]
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br i1 %C2, label %Loop, label %exit2
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exit1: ; preds = %Loop
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ret i32 0
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exit2: ; preds = %Cont
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ret i32 %V
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; CHECK-LABEL: @test8(
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; CHECK: exit1:
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; CHECK-NEXT: ret i32 0
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; CHECK: exit2:
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; CHECK-NEXT: %[[LCSSAPHI:.*]] = phi i32 [ %X
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; CHECK-NEXT: %V.le = add i32 %[[LCSSAPHI]], 1
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; CHECK-NEXT: ret i32 %V.le
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}
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define void @test9() {
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loopentry.2.i:
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br i1 false, label %no_exit.1.i.preheader, label %loopentry.3.i.preheader
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no_exit.1.i.preheader: ; preds = %loopentry.2.i
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br label %no_exit.1.i
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no_exit.1.i: ; preds = %endif.8.i, %no_exit.1.i.preheader
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br i1 false, label %return.i, label %endif.8.i
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endif.8.i: ; preds = %no_exit.1.i
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%inc.1.i = add i32 0, 1 ; <i32> [#uses=1]
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br i1 false, label %no_exit.1.i, label %loopentry.3.i.preheader.loopexit
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loopentry.3.i.preheader.loopexit: ; preds = %endif.8.i
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br label %loopentry.3.i.preheader
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loopentry.3.i.preheader: ; preds = %loopentry.3.i.preheader.loopexit, %loopentry.2.i
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%arg_num.0.i.ph13000 = phi i32 [ 0, %loopentry.2.i ], [ %inc.1.i, %loopentry.3.i.preheader.loopexit ] ; <i32> [#uses=0]
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ret void
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return.i: ; preds = %no_exit.1.i
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ret void
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; CHECK-LABEL: @test9(
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; CHECK: loopentry.3.i.preheader.loopexit:
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; CHECK-NEXT: %inc.1.i.le = add i32 0, 1
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; CHECK-NEXT: br label %loopentry.3.i.preheader
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}
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; Potentially trapping instructions may be sunk as long as they are guaranteed
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; to be executed.
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define i32 @test10(i32 %N) {
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Entry:
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br label %Loop
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Loop: ; preds = %Loop, %Entry
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%N_addr.0.pn = phi i32 [ %dec, %Loop ], [ %N, %Entry ] ; <i32> [#uses=3]
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%tmp.6 = sdiv i32 %N, %N_addr.0.pn ; <i32> [#uses=1]
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%dec = add i32 %N_addr.0.pn, -1 ; <i32> [#uses=1]
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%tmp.1 = icmp ne i32 %N_addr.0.pn, 0 ; <i1> [#uses=1]
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br i1 %tmp.1, label %Loop, label %Out
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Out: ; preds = %Loop
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ret i32 %tmp.6
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; CHECK-LABEL: @test10(
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; CHECK: Out:
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; CHECK-NEXT: %[[LCSSAPHI:.*]] = phi i32 [ %N_addr.0.pn
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; CHECK-NEXT: %tmp.6.le = sdiv i32 %N, %[[LCSSAPHI]]
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; CHECK-NEXT: ret i32 %tmp.6.le
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}
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; Should delete, not sink, dead instructions.
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define void @test11() {
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br label %Loop
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Loop:
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%dead = getelementptr %Ty* @X2, i64 0, i32 0
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br i1 false, label %Loop, label %Out
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Out:
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ret void
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; CHECK-LABEL: @test11(
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; CHECK: Out:
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; CHECK-NEXT: ret void
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}
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@c = common global [1 x i32] zeroinitializer, align 4
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; Test a *many* way nested loop with multiple exit blocks both of which exit
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; multiple loop nests. This exercises LCSSA corner cases.
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define i32 @PR18753(i1* %a, i1* %b, i1* %c, i1* %d) {
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entry:
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br label %l1.header
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l1.header:
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%iv = phi i64 [ %iv.next, %l1.latch ], [ 0, %entry ]
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%arrayidx.i = getelementptr inbounds [1 x i32]* @c, i64 0, i64 %iv
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br label %l2.header
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l2.header:
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%x0 = load i1* %c, align 4
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br i1 %x0, label %l1.latch, label %l3.preheader
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l3.preheader:
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br label %l3.header
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l3.header:
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%x1 = load i1* %d, align 4
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br i1 %x1, label %l2.latch, label %l4.preheader
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l4.preheader:
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br label %l4.header
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l4.header:
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%x2 = load i1* %a
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br i1 %x2, label %l3.latch, label %l4.body
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l4.body:
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call void @f(i32* %arrayidx.i)
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%x3 = load i1* %b
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%l = trunc i64 %iv to i32
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br i1 %x3, label %l4.latch, label %exit
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l4.latch:
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call void @g()
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%x4 = load i1* %b, align 4
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br i1 %x4, label %l4.header, label %exit
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l3.latch:
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br label %l3.header
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l2.latch:
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br label %l2.header
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l1.latch:
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%iv.next = add nsw i64 %iv, 1
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br label %l1.header
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exit:
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%lcssa = phi i32 [ %l, %l4.latch ], [ %l, %l4.body ]
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; CHECK-LABEL: @PR18753(
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; CHECK: exit:
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; CHECK-NEXT: %[[LCSSAPHI:.*]] = phi i64 [ %iv, %l4.latch ], [ %iv, %l4.body ]
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; CHECK-NEXT: %l.le = trunc i64 %[[LCSSAPHI]] to i32
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; CHECK-NEXT: ret i32 %l.le
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ret i32 %lcssa
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}
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; Can't sink stores out of exit blocks containing indirectbr instructions
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; because loop simplify does not create dedicated exits for such blocks. Test
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; that by sinking the store from lab21 to lab22, but not further.
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define void @test12() {
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; CHECK-LABEL: @test12
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br label %lab4
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lab4:
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br label %lab20
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lab5:
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br label %lab20
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lab6:
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br label %lab4
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lab7:
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br i1 undef, label %lab8, label %lab13
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lab8:
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br i1 undef, label %lab13, label %lab10
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lab10:
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br label %lab7
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lab13:
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ret void
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lab20:
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br label %lab21
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lab21:
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; CHECK: lab21:
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; CHECK-NOT: store
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; CHECK: br i1 false, label %lab21, label %lab22
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store i32 36127957, i32* undef, align 4
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br i1 undef, label %lab21, label %lab22
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lab22:
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; CHECK: lab22:
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; CHECK: store
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; CHECK-NEXT: indirectbr i8* undef
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indirectbr i8* undef, [label %lab5, label %lab6, label %lab7]
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}
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; Test that we don't crash when trying to sink stores and there's no preheader
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; available (which is used for creating loads that may be used by the SSA
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; updater)
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define void @test13() {
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; CHECK-LABEL: @test13
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br label %lab59
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lab19:
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br i1 undef, label %lab20, label %lab38
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lab20:
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br label %lab60
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lab21:
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br i1 undef, label %lab22, label %lab38
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lab22:
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br label %lab38
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lab38:
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ret void
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lab59:
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indirectbr i8* undef, [label %lab60, label %lab38]
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lab60:
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; CHECK: lab60:
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; CHECK: store
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; CHECK-NEXT: indirectbr
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store i32 2145244101, i32* undef, align 4
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indirectbr i8* undef, [label %lab21, label %lab19]
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}
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declare void @f(i32*)
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declare void @g()
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