mirror of
https://github.com/c64scene-ar/llvm-6502.git
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5bafff36c7
This is still a work in progress but most of the NEON instruction set is supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
79 lines
2.1 KiB
LLVM
79 lines
2.1 KiB
LLVM
; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
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; RUN: grep {vmov\\.s8} %t | count 2
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; RUN: grep {vmov\\.s16} %t | count 2
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; RUN: grep {vmov\\.u8} %t | count 2
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; RUN: grep {vmov\\.u16} %t | count 2
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; RUN: grep {vmov\\.32} %t | count 2
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define i32 @vget_lanes8(<8 x i8>* %A) nounwind {
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%tmp1 = load <8 x i8>* %A
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%tmp2 = extractelement <8 x i8> %tmp1, i32 1
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%tmp3 = sext i8 %tmp2 to i32
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ret i32 %tmp3
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}
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define i32 @vget_lanes16(<4 x i16>* %A) nounwind {
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%tmp1 = load <4 x i16>* %A
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%tmp2 = extractelement <4 x i16> %tmp1, i32 1
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%tmp3 = sext i16 %tmp2 to i32
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ret i32 %tmp3
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}
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define i32 @vget_laneu8(<8 x i8>* %A) nounwind {
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%tmp1 = load <8 x i8>* %A
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%tmp2 = extractelement <8 x i8> %tmp1, i32 1
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%tmp3 = zext i8 %tmp2 to i32
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ret i32 %tmp3
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}
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define i32 @vget_laneu16(<4 x i16>* %A) nounwind {
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%tmp1 = load <4 x i16>* %A
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%tmp2 = extractelement <4 x i16> %tmp1, i32 1
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%tmp3 = zext i16 %tmp2 to i32
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ret i32 %tmp3
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}
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; Do a vector add to keep the extraction from being done directly from memory.
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define i32 @vget_lanei32(<2 x i32>* %A) nounwind {
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%tmp1 = load <2 x i32>* %A
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%tmp2 = add <2 x i32> %tmp1, %tmp1
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%tmp3 = extractelement <2 x i32> %tmp2, i32 1
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ret i32 %tmp3
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}
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define i32 @vgetQ_lanes8(<16 x i8>* %A) nounwind {
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%tmp1 = load <16 x i8>* %A
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%tmp2 = extractelement <16 x i8> %tmp1, i32 1
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%tmp3 = sext i8 %tmp2 to i32
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ret i32 %tmp3
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}
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define i32 @vgetQ_lanes16(<8 x i16>* %A) nounwind {
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%tmp1 = load <8 x i16>* %A
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%tmp2 = extractelement <8 x i16> %tmp1, i32 1
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%tmp3 = sext i16 %tmp2 to i32
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ret i32 %tmp3
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}
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define i32 @vgetQ_laneu8(<16 x i8>* %A) nounwind {
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%tmp1 = load <16 x i8>* %A
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%tmp2 = extractelement <16 x i8> %tmp1, i32 1
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%tmp3 = zext i8 %tmp2 to i32
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ret i32 %tmp3
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}
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define i32 @vgetQ_laneu16(<8 x i16>* %A) nounwind {
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%tmp1 = load <8 x i16>* %A
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%tmp2 = extractelement <8 x i16> %tmp1, i32 1
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%tmp3 = zext i16 %tmp2 to i32
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ret i32 %tmp3
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}
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; Do a vector add to keep the extraction from being done directly from memory.
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define i32 @vgetQ_lanei32(<4 x i32>* %A) nounwind {
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%tmp1 = load <4 x i32>* %A
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%tmp2 = add <4 x i32> %tmp1, %tmp1
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%tmp3 = extractelement <4 x i32> %tmp2, i32 1
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ret i32 %tmp3
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}
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