Robert Khasanov 5dc8ac87f1 [AVX512] Enabling bit logic lowering ... Added lowering tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224132 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-12 17:02:18 +00:00
..
Analysis	Fix PR21694. r219517 added a use of SCEV divide in HowFarToZero computation. This divide can produce incorrect results as we are using an unsigned divide for what should be a modular divide. This change reverts back to a more conservative computation using trailing zeros.	2014-12-10 22:53:52 +00:00
AsmParser	AsmParser: Don't crash on an ill-formed MDNodeVector	2014-12-11 20:51:54 +00:00
Bitcode	Bitcode: Add missing "Remove in 4.0" comments	2014-12-12 02:11:31 +00:00
CodeGen	Reapply "[MachineScheduler] Fix for PR21807: minor code difference building with/without -g."	2014-12-12 15:09:58 +00:00
DebugInfo
ExecutionEngine	Move three methods only used by MCJIT to MCJIT.	2014-12-10 20:46:55 +00:00
IR	Document that PassManager::add() may delete the pass right away.	2014-12-12 01:27:01 +00:00
IRReader
LineEditor
Linker
LTO
MC
Object	Move three methods only used by MCJIT to MCJIT.	2014-12-10 20:46:55 +00:00
Option
ProfileData
Support	Remove a convoluted way of calling close by moving the call to the only caller.	2014-12-11 20:12:55 +00:00
TableGen	Use range-based for loops. NFC	2014-12-11 07:04:54 +00:00
Target	[AVX512] Enabling bit logic lowering	2014-12-12 17:02:18 +00:00
Transforms	[Reassociate] Use dbgs() instead of errs().	2014-12-12 14:44:12 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile