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https://github.com/c64scene-ar/llvm-6502.git
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391c5d231a
an argument to every operand printing function. Requires some slight tweaks to x86, the only user. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
372 lines
14 KiB
C++
372 lines
14 KiB
C++
//===-- IA64AsmPrinter.cpp - Print out IA64 LLVM as assembly --------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Duraid Madina and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to assembly accepted by the GNU binutils 'gas'
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// assembler. The Intel 'ias' and HP-UX 'as' assemblers *may* choke on this
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// output, but if so that's a bug I'd like to hear about: please file a bug
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// report in bugzilla. FYI, the not too bad 'ias' assembler is bundled with
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// the Intel C/C++ compiler for Itanium Linux.
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//
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//===----------------------------------------------------------------------===//
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#include "IA64.h"
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#include "IA64TargetMachine.h"
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#include "llvm/Module.h"
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#include "llvm/Type.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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namespace {
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Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
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struct IA64AsmPrinter : public AsmPrinter {
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std::set<std::string> ExternalFunctionNames, ExternalObjectNames;
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IA64AsmPrinter(std::ostream &O, TargetMachine &TM) : AsmPrinter(O, TM) {
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CommentString = "//";
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Data8bitsDirective = "\tdata1\t"; // FIXME: check that we are
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Data16bitsDirective = "\tdata2.ua\t"; // disabling auto-alignment
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Data32bitsDirective = "\tdata4.ua\t"; // properly
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Data64bitsDirective = "\tdata8.ua\t";
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ZeroDirective = "\t.skip\t";
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AsciiDirective = "\tstring\t";
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GlobalVarAddrPrefix="";
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GlobalVarAddrSuffix="";
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FunctionAddrPrefix="@fptr(";
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FunctionAddrSuffix=")";
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// FIXME: would be nice to have rodata (no 'w') when appropriate?
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ConstantPoolSection = "\n\t.section .data, \"aw\", \"progbits\"\n";
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}
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virtual const char *getPassName() const {
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return "IA64 Assembly Printer";
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}
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/// printInstruction - This method is automatically generated by tablegen
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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// This method is used by the tablegen'erated instruction printer.
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void printOperand(const MachineInstr *MI, unsigned OpNo){
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (MO.getType() == MachineOperand::MO_MachineRegister) {
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assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
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//XXX Bug Workaround: See note in Printer::doInitialization about %.
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O << TM.getRegisterInfo()->get(MO.getReg()).Name;
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} else {
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printOp(MO);
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}
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}
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void printS8ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
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if(val>=128) val=val-256; // if negative, flip sign
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O << val;
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}
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void printS14ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
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if(val>=8192) val=val-16384; // if negative, flip sign
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O << val;
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}
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void printS22ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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int val=(unsigned int)MI->getOperand(OpNo).getImmedValue();
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if(val>=2097152) val=val-4194304; // if negative, flip sign
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O << val;
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}
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void printU64ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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O << (uint64_t)MI->getOperand(OpNo).getImmedValue();
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}
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void printS64ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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// XXX : nasty hack to avoid GPREL22 "relocation truncated to fit" linker
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// errors - instead of add rX = @gprel(CPI<whatever>), r1;; we now
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// emit movl rX = @gprel(CPI<whatever);;
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// add rX = rX, r1;
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// this gives us 64 bits instead of 22 (for the add long imm) to play
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// with, which shuts up the linker. The problem is that the constant
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// pool entries aren't immediates at this stage, so we check here.
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// If it's an immediate, print it the old fashioned way. If it's
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// not, we print it as a constant pool index.
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if(MI->getOperand(OpNo).isImmediate()) {
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O << (int64_t)MI->getOperand(OpNo).getImmedValue();
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} else { // this is a constant pool reference: FIXME: assert this
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printOp(MI->getOperand(OpNo));
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}
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}
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void printGlobalOperand(const MachineInstr *MI, unsigned OpNo) {
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printOp(MI->getOperand(OpNo), false); // this is NOT a br.call instruction
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}
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void printCallOperand(const MachineInstr *MI, unsigned OpNo) {
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printOp(MI->getOperand(OpNo), true); // this is a br.call instruction
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}
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, bool isBRCALLinsn= false);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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bool doFinalization(Module &M);
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};
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} // end of anonymous namespace
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// Include the auto-generated portion of the assembly writer.
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#include "IA64GenAsmWriter.inc"
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool IA64AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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SetupMachineFunction(MF);
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O << "\n\n";
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// Print out constants referenced by the function
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EmitConstantPool(MF.getConstantPool());
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// Print out labels for the function.
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SwitchSection("\n\t.section .text, \"ax\", \"progbits\"\n", MF.getFunction());
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// ^^ means "Allocated instruXions in mem, initialized"
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EmitAlignment(5);
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O << "\t.global\t" << CurrentFnName << "\n";
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O << "\t.type\t" << CurrentFnName << ", @function\n";
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O << CurrentFnName << ":\n";
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block if there are any predecessors.
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if (I->pred_begin() != I->pred_end())
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O << PrivateGlobalPrefix << "LBB" << CurrentFnName << "_"
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<< I->getNumber() << ":\t"
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<< CommentString << " " << I->getBasicBlock()->getName() << "\n";
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printMachineInstruction(II);
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}
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}
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// We didn't modify anything.
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return false;
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}
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void IA64AsmPrinter::printOp(const MachineOperand &MO,
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bool isBRCALLinsn /* = false */) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_VirtualRegister:
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if (Value *V = MO.getVRegValueOrNull()) {
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O << "<" << V->getName() << ">";
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return;
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}
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// FALLTHROUGH
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_CCRegister: {
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O << RI.get(MO.getReg()).Name;
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return;
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}
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case MachineOperand::MO_SignExtendedImmed:
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case MachineOperand::MO_UnextendedImmed:
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O << /*(unsigned int)*/MO.getImmedValue();
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return;
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case MachineOperand::MO_MachineBasicBlock: {
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MachineBasicBlock *MBBOp = MO.getMachineBasicBlock();
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O << PrivateGlobalPrefix << "LBB"
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<< Mang->getValueName(MBBOp->getParent()->getFunction())
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<< "_" << MBBOp->getNumber () << "\t// "
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<< MBBOp->getBasicBlock ()->getName ();
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return;
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}
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case MachineOperand::MO_PCRelativeDisp:
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std::cerr << "Shouldn't use addPCDisp() when building IA64 MachineInstrs";
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abort ();
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return;
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case MachineOperand::MO_ConstantPoolIndex: {
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O << "@gprel(" << PrivateGlobalPrefix << "CPI" << getFunctionNumber() << "_"
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<< MO.getConstantPoolIndex() << ")";
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return;
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}
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case MachineOperand::MO_GlobalAddress: {
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// functions need @ltoff(@fptr(fn_name)) form
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GlobalValue *GV = MO.getGlobal();
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Function *F = dyn_cast<Function>(GV);
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bool Needfptr=false; // if we're computing an address @ltoff(X), do
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// we need to decorate it so it becomes
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// @ltoff(@fptr(X)) ?
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if (F && !isBRCALLinsn /*&& F->isExternal()*/)
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Needfptr=true;
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// if this is the target of a call instruction, we should define
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// the function somewhere (GNU gas has no problem without this, but
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// Intel ias rightly complains of an 'undefined symbol')
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if (F /*&& isBRCALLinsn*/ && F->isExternal())
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ExternalFunctionNames.insert(Mang->getValueName(MO.getGlobal()));
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else
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if (GV->isExternal()) // e.g. stuff like 'stdin'
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ExternalObjectNames.insert(Mang->getValueName(MO.getGlobal()));
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if (!isBRCALLinsn)
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O << "@ltoff(";
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if (Needfptr)
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O << "@fptr(";
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O << Mang->getValueName(MO.getGlobal());
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if (Needfptr)
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O << ")"; // close fptr(
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if (!isBRCALLinsn)
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O << ")"; // close ltoff(
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << " + " << Offset;
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else if (Offset < 0)
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O << " - " << -Offset;
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return;
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}
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case MachineOperand::MO_ExternalSymbol:
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O << MO.getSymbolName();
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ExternalFunctionNames.insert(MO.getSymbolName());
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return;
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default:
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O << "<AsmPrinter: unknown operand type: " << MO.getType() << " >"; return;
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}
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}
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/// printMachineInstruction -- Print out a single IA64 LLVM instruction
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/// MI to the current output stream.
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///
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void IA64AsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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++EmittedInsts;
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// Call the autogenerated instruction printer routines.
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printInstruction(MI);
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}
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bool IA64AsmPrinter::doInitialization(Module &M) {
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AsmPrinter::doInitialization(M);
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O << "\n.ident \"LLVM-ia64\"\n\n"
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<< "\t.psr lsb\n" // should be "msb" on HP-UX, for starters
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<< "\t.radix C\n"
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<< "\t.psr abi64\n"; // we only support 64 bits for now
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return false;
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}
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bool IA64AsmPrinter::doFinalization(Module &M) {
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const TargetData &TD = TM.getTargetData();
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// Print out module-level global variables here.
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for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
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I != E; ++I)
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if (I->hasInitializer()) { // External global require no code
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O << "\n\n";
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std::string name = Mang->getValueName(I);
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Constant *C = I->getInitializer();
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unsigned Size = TD.getTypeSize(C->getType());
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unsigned Align = TD.getTypeAlignmentShift(C->getType());
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if (C->isNullValue() &&
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(I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
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I->hasWeakLinkage() /* FIXME: Verify correct */)) {
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SwitchSection(".data", I);
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if (I->hasInternalLinkage()) {
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O << "\t.lcomm " << name << "," << TD.getTypeSize(C->getType())
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<< "," << (1 << Align);
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O << "\t\t// ";
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} else {
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O << "\t.common " << name << "," << TD.getTypeSize(C->getType())
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<< "," << (1 << Align);
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O << "\t\t// ";
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}
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WriteAsOperand(O, I, true, true, &M);
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O << "\n";
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} else {
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switch (I->getLinkage()) {
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case GlobalValue::LinkOnceLinkage:
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case GlobalValue::WeakLinkage: // FIXME: Verify correct for weak.
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// Nonnull linkonce -> weak
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O << "\t.weak " << name << "\n";
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O << "\t.section\t.llvm.linkonce.d." << name
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<< ", \"aw\", \"progbits\"\n";
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SwitchSection("", I);
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break;
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case GlobalValue::AppendingLinkage:
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// FIXME: appending linkage variables should go into a section of
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// their name or something. For now, just emit them as external.
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case GlobalValue::ExternalLinkage:
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// If external or appending, declare as a global symbol
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O << "\t.global " << name << "\n";
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// FALL THROUGH
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case GlobalValue::InternalLinkage:
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SwitchSection(C->isNullValue() ? ".bss" : ".data", I);
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break;
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case GlobalValue::GhostLinkage:
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std::cerr << "GhostLinkage cannot appear in IA64AsmPrinter!\n";
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abort();
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}
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EmitAlignment(Align);
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O << "\t.type " << name << ",@object\n";
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O << "\t.size " << name << "," << Size << "\n";
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O << name << ":\t\t\t\t// ";
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WriteAsOperand(O, I, true, true, &M);
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O << " = ";
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WriteAsOperand(O, C, false, false, &M);
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O << "\n";
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EmitGlobalConstant(C);
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}
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}
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// we print out ".global X \n .type X, @function" for each external function
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O << "\n\n// br.call targets referenced (and not defined) above: \n";
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for (std::set<std::string>::iterator i = ExternalFunctionNames.begin(),
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e = ExternalFunctionNames.end(); i!=e; ++i) {
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O << "\t.global " << *i << "\n\t.type " << *i << ", @function\n";
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}
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O << "\n\n";
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// we print out ".global X \n .type X, @object" for each external object
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O << "\n\n// (external) symbols referenced (and not defined) above: \n";
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for (std::set<std::string>::iterator i = ExternalObjectNames.begin(),
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e = ExternalObjectNames.end(); i!=e; ++i) {
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O << "\t.global " << *i << "\n\t.type " << *i << ", @object\n";
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}
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O << "\n\n";
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AsmPrinter::doFinalization(M);
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return false; // success
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}
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/// createIA64CodePrinterPass - Returns a pass that prints the IA64
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/// assembly code for a MachineFunction to the given output stream, using
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/// the given target machine description.
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///
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FunctionPass *llvm::createIA64CodePrinterPass(std::ostream &o,TargetMachine &tm){
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return new IA64AsmPrinter(o, tm);
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}
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