llvm-6502/test/MC/Disassembler
Sean Callanan 751752e7ca Fixed handling of immediate operand sizes, which
weren't properly reflecting the OperandSize attribute
of the instruction leading to improper decoding of
certain instructions with the 66H prefix.  Also added
a test case for this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117084 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 01:24:11 +00:00
..
arm-tests.txt ARM instructions that are both predicated and set the condition codes 2010-10-15 03:23:44 +00:00
dg.exp
neon-tests.txt Fix vmov.f64 disassembly on targets where sizeof(long) != 8. 2010-09-17 23:48:07 +00:00
simple-tests.txt Fixed handling of immediate operand sizes, which 2010-10-22 01:24:11 +00:00
thumb-tests.txt