Chad Rosier 5df2e16ba1 [inline asm] Add a test case for r180226. The specific issue is that the inline ... assembly is requesting a 64-bit register, which is invalid for i386. rdar://13731657 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180445 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-25 17:10:21 +00:00
..
AArch64	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
ARM	Fix constant folding for one lane vector types. Constant folding one lane vector types not returns a vector instead of a scalar.	2013-04-25 09:32:33 +00:00
CPP	test commit: remove blank line.	2013-03-14 05:43:59 +00:00
Generic	XFAIL some of the generic CodeGen tests for Hexagon.	2013-03-25 21:04:16 +00:00
Hexagon	Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.	2013-04-23 21:17:40 +00:00
Inputs	Revert "Adding DIImportedModules to DIScopes."	2013-03-28 02:44:59 +00:00
MBlaze	Remove unnecessary leading comment characters in lit-only file	2013-03-18 22:08:16 +00:00
Mips	[mips] In performDSPShiftCombine, check that all elements in the vector are	2013-04-22 19:58:23 +00:00
MSP430	Remove unnecessary leading comment characters in lit-only file	2013-03-18 22:08:16 +00:00
NVPTX	[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.	2013-03-30 14:29:30 +00:00
PowerPC	Fix PPC optimizeCompareInstr swapped-sub argument handling	2013-04-19 22:08:38 +00:00
R600	R600: Use SHT_PROGBITS for the .AMDGPU.config section	2013-04-24 23:56:14 +00:00
SI
SPARC	Cleanup: test source files do not need to be executable	2013-04-22 08:02:43 +00:00
Thumb	Revert "Adding DIImportedModules to DIScopes."	2013-03-28 02:44:59 +00:00
Thumb2	SDAG: Handle scalarizing an extend of a <1 x iN> vector.	2013-03-07 05:47:54 +00:00
X86	[inline asm] Add a test case for r180226. The specific issue is that the inline	2013-04-25 17:10:21 +00:00
XCore	[XCore] Extend test to check positve offsets are folded into addresses.	2013-04-16 20:05:52 +00:00