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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
45 lines
1.8 KiB
LLVM
45 lines
1.8 KiB
LLVM
; Verify that we can create unaligned loads and stores from VSX intrinsics.
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target triple = "powerpc64-unknown-linux-gnu"
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@vf = common global <4 x float> zeroinitializer, align 1
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@res_vf = common global <4 x float> zeroinitializer, align 1
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@vd = common global <2 x double> zeroinitializer, align 1
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@res_vd = common global <2 x double> zeroinitializer, align 1
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define void @test1() {
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entry:
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%t1 = alloca <4 x float>*, align 8
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%t2 = alloca <2 x double>*, align 8
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store <4 x float>* @vf, <4 x float>** %t1, align 8
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%0 = load <4 x float>*, <4 x float>** %t1, align 8
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%1 = bitcast <4 x float>* %0 to i8*
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%2 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(i8* %1)
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store <4 x float>* @res_vf, <4 x float>** %t1, align 8
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%3 = load <4 x float>*, <4 x float>** %t1, align 8
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%4 = bitcast <4 x float>* %3 to i8*
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call void @llvm.ppc.vsx.stxvw4x(<4 x i32> %2, i8* %4)
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store <2 x double>* @vd, <2 x double>** %t2, align 8
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%5 = load <2 x double>*, <2 x double>** %t2, align 8
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%6 = bitcast <2 x double>* %5 to i8*
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%7 = call <2 x double> @llvm.ppc.vsx.lxvd2x(i8* %6)
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store <2 x double>* @res_vd, <2 x double>** %t2, align 8
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%8 = load <2 x double>*, <2 x double>** %t2, align 8
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%9 = bitcast <2 x double>* %8 to i8*
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call void @llvm.ppc.vsx.stxvd2x(<2 x double> %7, i8* %9)
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ret void
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}
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; CHECK-LABEL: @test1
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; CHECK: %0 = load <4 x i32>, <4 x i32>* bitcast (<4 x float>* @vf to <4 x i32>*), align 1
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; CHECK: store <4 x i32> %0, <4 x i32>* bitcast (<4 x float>* @res_vf to <4 x i32>*), align 1
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; CHECK: %1 = load <2 x double>, <2 x double>* @vd, align 1
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; CHECK: store <2 x double> %1, <2 x double>* @res_vd, align 1
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declare <4 x i32> @llvm.ppc.vsx.lxvw4x(i8*)
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declare void @llvm.ppc.vsx.stxvw4x(<4 x i32>, i8*)
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declare <2 x double> @llvm.ppc.vsx.lxvd2x(i8*)
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declare void @llvm.ppc.vsx.stxvd2x(<2 x double>, i8*)
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