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https://github.com/c64scene-ar/llvm-6502.git
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23e8b71526
ComputeMaskedBits knows about cttz, ctlz, and ctpop. Teach SelectionDAG's ComputeMaskedBits what InstCombine's knows about SRem. And teach them both some things about high bits in Mul, UDiv, URem, and Sub. This allows instcombine and dagcombine to eliminate sign-extension operations in several new cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50358 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
1001 B
LLVM
46 lines
1001 B
LLVM
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep sext
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; RUN: llvm-as < %s | llc -march=x86-64 | not grep movslq
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; RUN: llvm-as < %s | llc -march=x86 | not grep sar
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declare i32 @llvm.ctpop.i32(i32)
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declare i32 @llvm.ctlz.i32(i32)
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declare i32 @llvm.cttz.i32(i32)
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define i64 @foo(i32 %x) {
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%t = call i32 @llvm.ctpop.i32(i32 %x)
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%s = sext i32 %t to i64
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ret i64 %s
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}
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define i64 @boo(i32 %x) {
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%t = call i32 @llvm.ctlz.i32(i32 %x)
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%s = sext i32 %t to i64
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ret i64 %s
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}
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define i64 @zoo(i32 %x) {
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%t = call i32 @llvm.cttz.i32(i32 %x)
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%s = sext i32 %t to i64
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ret i64 %s
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}
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define i64 @coo(i32 %x) {
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%t = udiv i32 %x, 3
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%s = sext i32 %t to i64
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ret i64 %s
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}
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define i64 @moo(i32 %x) {
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%t = urem i32 %x, 30000
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%s = sext i32 %t to i64
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ret i64 %s
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}
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define i64 @yoo(i32 %x) {
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%u = lshr i32 %x, 3
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%t = mul i32 %u, 3
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%s = sext i32 %t to i64
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ret i64 %s
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}
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define i64 @voo(i32 %x) {
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%t = and i32 %x, 511
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%u = sub i32 20000, %t
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%s = sext i32 %u to i64
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ret i64 %s
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}
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