Chad Rosier b30d031de4 [AArch64] Improve AA to remove unneeded edges in the AA MI scheduling graph. ... Patch by Sanjin Sijaric <ssijaric@codeaurora.org>! Phabricator Review: http://reviews.llvm.org/D5103 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217371 91177308-0d34-0410-b5e6-96231b3b80d8		2014-09-08 14:43:48 +00:00
..
CostTable.h
Target.td	Add isInsertSubreg property.	2014-08-20 23:49:36 +00:00
TargetCallingConv.h
TargetCallingConv.td
TargetFrameLowering.h	Re-apply r211399, "Generate native unwind info on Win64" with a fix to ignore SEH pseudo ops in X86 JIT emitter.	2014-06-25 12:41:52 +00:00
TargetInstrInfo.h	[AArch64] Improve AA to remove unneeded edges in the AA MI scheduling graph.	2014-09-08 14:43:48 +00:00
TargetIntrinsicInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetItinerary.td
TargetLibraryInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetLowering.h	Refactor AtomicExpandPass and add a generic isAtomic() method to Instruction	2014-09-03 21:29:59 +00:00
TargetLoweringObjectFile.h	CodeGen: Stick constant pool entries in COMDAT sections for WinCOFF	2014-07-14 22:57:27 +00:00
TargetMachine.h	Reinstate "Nuke the old JIT."	2014-09-02 22:28:02 +00:00
TargetOpcodes.h	[stack protector] Fix a potential security bug in stack protector where the	2014-07-25 19:31:34 +00:00
TargetOptions.h	Satiate the sanitizer build bot	2014-08-21 20:09:15 +00:00
TargetRegisterInfo.h	[RegisterCoalescer] Moving the RegisterCoalescer subtarget hook onto the TargetRegisterInfo instead of the TargetSubtargetInfo.	2014-07-16 20:13:31 +00:00
TargetSchedule.td	Move Post RA Scheduling flag bit into SchedMachineModel	2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td	Fix typos	2014-07-17 17:50:22 +00:00
TargetSelectionDAGInfo.h	Trailing whitespace.	2014-07-23 00:42:52 +00:00
TargetSubtargetInfo.h	Remove resetSubtargetFeatures as it is unused.	2014-09-03 20:36:31 +00:00