Hal Finkel 5e508855d6 [StackMaps] Allow the target to pre-process the live-out mask ... Some targets, PowerPC for example, have pseudo-registers (such as that used to represent the rounding mode), that don't have DWARF register numbers or a register class. These are used only for internal dependency tracking, and should not appear in the recorded live-outs. This adds a callback allowing the target to pre-process the live-out mask in order to remove these kinds of registers so that the StackMaps code does not complain about them and/or attempt to include them in the output. This will be used by the PowerPC target in a future commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225805 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-13 17:47:59 +00:00
..
Analysis	[PM] Refactor the new pass manager to use a single template to implement	2015-01-13 11:13:56 +00:00
AsmParser	AsmParser: Use subclass API instead of MDNode wrappers, NFC	2015-01-12 22:27:39 +00:00
Bitcode	Bitcode: Range-based for, NFC	2015-01-12 22:35:34 +00:00
CodeGen	[StackMaps] Allow the target to pre-process the live-out mask	2015-01-13 17:47:59 +00:00
DebugInfo
ExecutionEngine	Fix undefined behavior (shift of negative value) in RuntimeDyldMachOAArch64::encodeAddend.	2015-01-10 00:46:38 +00:00
IR	[PM] Refactor the new pass manager to use a single template to implement	2015-01-13 11:13:56 +00:00
IRReader
LineEditor
Linker	Use the DiagnosticHandler to print diagnostics when reading bitcode.	2015-01-10 00:07:30 +00:00
LTO	Use the DiagnosticHandler to print diagnostics when reading bitcode.	2015-01-10 00:07:30 +00:00
MC	Add the llvm.frameallocate and llvm.recoverframeallocation intrinsics	2015-01-13 00:48:10 +00:00
Object
Option
ProfileData
Support
TableGen
Target	[PowerPC] Split the blr definition into BLR and BLR8	2015-01-13 17:47:54 +00:00
Transforms	Revert "SLPVectorizer: Cache results from memory alias checking."	2015-01-13 14:36:46 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile