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https://github.com/c64scene-ar/llvm-6502.git
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e3e5fcab94
This is a 1-line patch (with a TODO for AVX because that will affect even more regression tests) that lets us substitute the appropriate 64-bit store for the float/double/int domains. It's not clear to me exactly what the difference is between the 0xD6 (MOVPQI2QImr) and 0x7E (MOVSDto64mr) opcodes, but this is apparently the right choice. Differential Revision: http://reviews.llvm.org/D8691 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235014 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
976 B
LLVM
43 lines
976 B
LLVM
; RUN: llc < %s -relocation-model=static -mtriple=i686-unknown -mattr=+mmx,+sse3 | FileCheck %s
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; 64-bit stores here do not use MMX.
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@M1 = external global <1 x i64>
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@M2 = external global <2 x i32>
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@S1 = external global <2 x i64>
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@S2 = external global <4 x i32>
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define void @test1() {
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;CHECK-LABEL: @test1
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;CHECK: xorps
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store <1 x i64> zeroinitializer, <1 x i64>* @M1
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store <2 x i32> zeroinitializer, <2 x i32>* @M2
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ret void
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}
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define void @test2() {
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;CHECK-LABEL: @test2
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;CHECK: pcmpeqd
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store <1 x i64> < i64 -1 >, <1 x i64>* @M1
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store <2 x i32> < i32 -1, i32 -1 >, <2 x i32>* @M2
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ret void
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}
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define void @test3() {
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;CHECK-LABEL: @test3
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;CHECK: xorps
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store <2 x i64> zeroinitializer, <2 x i64>* @S1
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store <4 x i32> zeroinitializer, <4 x i32>* @S2
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ret void
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}
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define void @test4() {
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;CHECK-LABEL: @test4
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;CHECK: pcmpeqd
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store <2 x i64> < i64 -1, i64 -1>, <2 x i64>* @S1
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store <4 x i32> < i32 -1, i32 -1, i32 -1, i32 -1 >, <4 x i32>* @S2
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ret void
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}
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