Andrew Trick 2e3f799f01 Add TargetRegisterInfo::reverseLocalAssignment hook. ... This hook reverses the order of assignment for local live ranges. This will generally allocate shorter local live ranges first. For targets with many registers, this could reduce regalloc compile time by a large factor. It should still achieve optimal coloring; however, it can change register eviction decisions. It is disabled by default for two reasons: (1) Top-down allocation is simpler and easier to debug for targets that don't benefit from reversing the order. (2) Bottom-up allocation could result in poor evicition decisions on some targets affecting the performance of compiled code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197001 91177308-0d34-0410-b5e6-96231b3b80d8		2013-12-11 03:40:15 +00:00
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CostTable.h
Mangler.h	Remove the isImplicitlyPrivate argument of getNameWithPrefix.	2013-12-05 05:53:12 +00:00
Target.td	Remove dead code.	2013-12-02 05:10:04 +00:00
TargetCallingConv.h
TargetCallingConv.td
TargetFrameLowering.h
TargetInstrInfo.h	Added a size field to the stack map record to handle subregister spills.	2013-11-17 01:36:23 +00:00
TargetIntrinsicInfo.h
TargetItinerary.td
TargetJITInfo.h
TargetLibraryInfo.h	Convert calls to __sinpi and __cospi into __sincospi_stret	2013-11-03 06:48:38 +00:00
TargetLowering.h	Add TargetLowering::prepareVolatileOrAtomicLoad	2013-12-10 10:36:34 +00:00
TargetLoweringObjectFile.h	Move getSymbolWithGlobalValueBase to TargetLoweringObjectFile.	2013-12-02 16:25:47 +00:00
TargetMachine.h	Add a RequireStructuredCFG Field to TargetMachine.	2013-12-07 01:49:19 +00:00
TargetOpcodes.h
TargetOptions.h
TargetRegisterInfo.h	Add TargetRegisterInfo::reverseLocalAssignment hook.	2013-12-11 03:40:15 +00:00
TargetSchedule.td	Machine model comments. Explain a ProcessorUnit's BufferSize.	2013-12-05 17:55:53 +00:00
TargetSelectionDAG.td
TargetSelectionDAGInfo.h
TargetSubtargetInfo.h