llvm-6502/test/MC/Mips/mips32
Daniel Sanders 5ee24f37af [mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rather than 16-bit in MIPS32r6/MIPS64r6
Summary:
The error message for the invalid.s cases isn't very helpful. It happens because
there is an instruction with a wider immediate that would have matched if the
NotMips32r6 predicate were true. I have some WIP to improve the message but it
affects most error messages for removed/re-encoded instructions on
MIPS32r6/MIPS64r6 and should therefore be a separate commit.

Depens on D4115

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211012 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-16 10:00:45 +00:00
..
invalid-mips32r2-xfail.s [mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them 2014-05-13 11:45:36 +00:00
invalid-mips32r2.s [mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them 2014-05-13 11:45:36 +00:00
invalid-mips64.s [mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64 2014-05-12 12:41:59 +00:00
valid-xfail.s [mips] Correct tests that are meant to test valid assembly. They were actually rejected by GAS. 2014-05-08 15:17:29 +00:00
valid.s [mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rather than 16-bit in MIPS32r6/MIPS64r6 2014-06-16 10:00:45 +00:00