Chandler Carruth 5ee516549f [x86] Fix PR22377, a regression with the new vector shuffle legality ... test. This was just a matter of the DAG combine for vector shuffles being too aggressive. This is a bit of a grey area, but I think generally if we can re-use intermediate shuffles, we should. Certainly, given the test cases I have available, this seems like the right call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229285 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-15 07:01:10 +00:00
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AArch64	[SimplifyCFG] Be more aggressive	2015-02-13 10:48:30 +00:00
ARM	[SimplifyCFG] Swap to using TargetTransformInfo for cost	2015-02-11 12:15:41 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips	[mips][microMIPS] Delay slot filler: Replace the microMIPS JR with the JRC	2015-02-13 17:51:27 +00:00
MSP430
NVPTX
PowerPC	[CodeGenPrepare] Removed duplicate logic. SimplifyCFG already knows how to speculate calls to cttz/ctlz.	2015-02-13 14:15:48 +00:00
R600	R600/SI: Implement correct f64 fdiv	2015-02-14 04:30:08 +00:00
SPARC
SystemZ
Thumb
Thumb2	Make buildbots better.	2015-02-11 12:24:09 +00:00
X86	[x86] Fix PR22377, a regression with the new vector shuffle legality	2015-02-15 07:01:10 +00:00
XCore