mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
1.7 KiB
LLVM
48 lines
1.7 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-apple-darwin
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; Can't copy or spill / restore CPSR.
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; rdar://9105206
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define fastcc void @t() ssp align 2 {
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entry:
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br i1 undef, label %bb3.i, label %bb2.i
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bb2.i: ; preds = %entry
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br label %bb3.i
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bb3.i: ; preds = %bb2.i, %entry
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br i1 undef, label %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71, label %bb.i69
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bb.i69: ; preds = %bb3.i
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br label %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71
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_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71: ; preds = %bb.i69, %bb3.i
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%0 = select i1 undef, float 0.000000e+00, float undef
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%1 = fdiv float %0, undef
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%2 = fcmp ult float %1, 0xBF847AE140000000
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%storemerge9 = select i1 %2, float %1, float 0.000000e+00
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store float %storemerge9, float* undef, align 4
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br i1 undef, label %bb42, label %bb47
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bb42: ; preds = %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71
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br i1 undef, label %bb46, label %bb53
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bb46: ; preds = %bb42
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br label %bb48
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bb47: ; preds = %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71
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br label %bb48
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bb48: ; preds = %bb47, %bb46
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br i1 undef, label %bb1.i14, label %bb.i13
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bb.i13: ; preds = %bb48
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br label %bb1.i14
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bb1.i14: ; preds = %bb.i13, %bb48
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br label %bb53
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bb53: ; preds = %bb1.i14, %bb42
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ret void
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}
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