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28a24ca471
ANDS does not use the same encoding scheme as other xxxS instructions (e.g., ADDS). Take that into account to avoid wrong peephole optimization. <rdar://problem/16693089> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207020 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
1.1 KiB
LLVM
32 lines
1.1 KiB
LLVM
; RUN: llc %s -o - | FileCheck %s
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; Check that ANDS (tst) is not merged with ADD when the immediate
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; is not 0.
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; <rdar://problem/16693089>
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios"
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; CHECK-LABEL: tst1:
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; CHECK: add [[REG:w[0-9]+]], w{{[0-9]+}}, #1
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; CHECK: tst [[REG]], #0x1
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define void @tst1() {
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entry:
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br i1 undef, label %for.end, label %for.body
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for.body: ; preds = %for.body, %entry
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%result.09 = phi i32 [ %add2.result.0, %for.body ], [ 1, %entry ]
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%i.08 = phi i32 [ %inc, %for.body ], [ 2, %entry ]
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%and = and i32 %i.08, 1
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%cmp1 = icmp eq i32 %and, 0
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%add2.result.0 = select i1 %cmp1, i32 undef, i32 %result.09
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%inc = add nsw i32 %i.08, 1
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%cmp = icmp slt i32 %i.08, undef
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br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
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for.cond.for.end_crit_edge: ; preds = %for.body
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%add2.result.0.lcssa = phi i32 [ %add2.result.0, %for.body ]
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br label %for.end
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for.end: ; preds = %for.cond.for.end_crit_edge, %entry
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ret void
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}
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