llvm-6502/test/CodeGen/ARM64/dead-register-def-bug.ll
Lang Hames 89218827c8 [ARM64] Teach the ARM64DeadRegisterDefinition pass to respect implicit-defs.
When rematerializing through truncates, the coalescer may produce instructions
with dead defs, but live implicit-defs of subregs:
E.g.
  %X1<def,dead> = MOVi64imm 2, %W1<imp-def>; %X1:GPR64, %W1:GPR32

These instructions are live, and their definitions should not be rewritten.

Fixes <rdar://problem/16492408>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205565 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 20:51:08 +00:00

33 lines
883 B
LLVM

; RUN: llc -mtriple="arm64-apple-ios" < %s | FileCheck %s
;
; Check that the dead register definition pass is considering implicit defs.
; When rematerializing through truncates, the coalescer may produce instructions
; with dead defs, but live implicit-defs of subregs:
; E.g. %X1<def, dead> = MOVi64imm 2, %W1<imp-def>; %X1:GPR64, %W1:GPR32
; These instructions are live, and their definitions should not be rewritten.
;
; <rdar://problem/16492408>
define void @testcase() {
; CHECK: testcase:
; CHECK-NOT: orr xzr, xzr, #0x2
bb1:
%tmp1 = tail call float @ceilf(float 2.000000e+00)
%tmp2 = fptoui float %tmp1 to i64
br i1 undef, label %bb2, label %bb3
bb2:
tail call void @foo()
br label %bb3
bb3:
%tmp3 = trunc i64 %tmp2 to i32
tail call void @bar(i32 %tmp3)
ret void
}
declare void @foo()
declare void @bar(i32)
declare float @ceilf(float) nounwind readnone