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89218827c8
When rematerializing through truncates, the coalescer may produce instructions with dead defs, but live implicit-defs of subregs: E.g. %X1<def,dead> = MOVi64imm 2, %W1<imp-def>; %X1:GPR64, %W1:GPR32 These instructions are live, and their definitions should not be rewritten. Fixes <rdar://problem/16492408> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205565 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
883 B
LLVM
33 lines
883 B
LLVM
; RUN: llc -mtriple="arm64-apple-ios" < %s | FileCheck %s
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;
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; Check that the dead register definition pass is considering implicit defs.
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; When rematerializing through truncates, the coalescer may produce instructions
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; with dead defs, but live implicit-defs of subregs:
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; E.g. %X1<def, dead> = MOVi64imm 2, %W1<imp-def>; %X1:GPR64, %W1:GPR32
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; These instructions are live, and their definitions should not be rewritten.
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;
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; <rdar://problem/16492408>
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define void @testcase() {
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; CHECK: testcase:
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; CHECK-NOT: orr xzr, xzr, #0x2
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bb1:
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%tmp1 = tail call float @ceilf(float 2.000000e+00)
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%tmp2 = fptoui float %tmp1 to i64
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br i1 undef, label %bb2, label %bb3
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bb2:
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tail call void @foo()
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br label %bb3
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bb3:
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%tmp3 = trunc i64 %tmp2 to i32
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tail call void @bar(i32 %tmp3)
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ret void
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}
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declare void @foo()
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declare void @bar(i32)
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declare float @ceilf(float) nounwind readnone
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