mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-02 07:11:49 +00:00
7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
18 lines
737 B
LLVM
18 lines
737 B
LLVM
; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
|
|
|
|
; LowerCONCAT_VECTORS() was reversing the order of two parts.
|
|
; rdar://11558157
|
|
; rdar://11559553
|
|
define <16 x i8> @test(<16 x i8> %q0, <16 x i8> %q1, i8* nocapture %dest) nounwind {
|
|
entry:
|
|
; CHECK-LABEL: test:
|
|
; CHECK: ins.d v0[1], v1[0]
|
|
%0 = bitcast <16 x i8> %q0 to <2 x i64>
|
|
%shuffle.i = shufflevector <2 x i64> %0, <2 x i64> undef, <1 x i32> zeroinitializer
|
|
%1 = bitcast <16 x i8> %q1 to <2 x i64>
|
|
%shuffle.i4 = shufflevector <2 x i64> %1, <2 x i64> undef, <1 x i32> zeroinitializer
|
|
%shuffle.i3 = shufflevector <1 x i64> %shuffle.i, <1 x i64> %shuffle.i4, <2 x i32> <i32 0, i32 1>
|
|
%2 = bitcast <2 x i64> %shuffle.i3 to <16 x i8>
|
|
ret <16 x i8> %2
|
|
}
|