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LLVM backend for 6502
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Dylan Noblesmith 5f36bb1759 unittests: add test for APInt::toString() 
Follow up to r133032.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 23:36:34 +00:00
autoconf Happy new year. 2011-06-12 15:26:54 +00:00
bindings
cmake Fix cmake dependencies. 2011-05-24 00:58:06 +00:00
docs Use set operations instead of plain lists to enumerate register classes. 2011-06-15 23:28:14 +00:00
examples Modify comment. 2011-06-09 20:11:46 +00:00
include Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match. 2011-06-15 23:35:18 +00:00
lib Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match. 2011-06-15 23:35:18 +00:00
projects Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
runtime Remove the LTO stuff from the profile_rt library's Makefile. 2011-06-15 04:56:13 +00:00
test Testcase for previous commit. 2011-06-15 21:18:51 +00:00
tools Revert the last two commits in the series. r132911, r132912. 2011-06-13 11:53:31 +00:00
unittests unittests: add test for APInt::toString() 2011-06-15 23:36:34 +00:00
utils Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match. 2011-06-15 23:35:18 +00:00
website
.gitignore Ignore Vim swap files 2011-05-31 21:54:28 +00:00
build-for-llvm-top.sh
CMakeLists.txt Rename profile_rt.so to libprofile_rt.so under configure+make (it already was 2011-04-29 02:12:06 +00:00
configure Happy new year. 2011-06-12 15:26:54 +00:00
CREDITS.TXT
LICENSE.TXT Happy new year. 2011-06-12 15:26:54 +00:00
llvm.spec.in
Makefile Install libprofile_rt.dylib where it's more available for gcov support. 2011-06-10 21:47:14 +00:00
Makefile.common
Makefile.config.in
Makefile.rules Fix a ton of comment typos found by codespell. Patch by 2011-04-15 05:18:47 +00:00
ModuleInfo.txt
README.txt reverting test commit 2011-05-12 17:38:08 +00:00

README.txt 

Low Level Virtual Machine (LLVM)
================================

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