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https://github.com/c64scene-ar/llvm-6502.git
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e777fb4725
Summary: They behave in accordance with the Has2008 and ABS2008 configuration bits of the processor which are used to select between the 1985 and 2008 versions of IEEE 754. In 1985 mode, these instructions are arithmetic (i.e. they raise invalid operation exceptions when given NaN), in 2008 mode they are non-arithmetic (i.e. they are copies). nmadd.[ds], and nmsub.[ds] are still subject to -enable-no-nans-fp-math because the ISA spec does not explicitly state that they obey Has2008 and ABS2008. Fixed the issue with the previous version of this patch (r205628). A pre-existing 'let Predicate =' statement was removing some predicates that were necessary for FP64 to behave correctly. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3274 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205844 91177308-0d34-0410-b5e6-96231b3b80d8
104 lines
3.0 KiB
LLVM
104 lines
3.0 KiB
LLVM
; Check that madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are supported
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; correctly.
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; The spec for nmadd.[ds], and nmsub.[ds] does not state that they obey the
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; the Has2008 and ABS2008 configuration bits which govern the conformance to
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; IEEE 754 (1985) and IEEE 754 (2008). These instructions are therefore only
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; available when -enable-no-nans-fp-math is given.
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; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -enable-no-nans-fp-math | FileCheck %s -check-prefix=32R2 -check-prefix=CHECK
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; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefix=64R2 -check-prefix=CHECK
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; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=32R2NAN -check-prefix=CHECK
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; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=64R2NAN -check-prefix=CHECK
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define float @FOO0float(float %a, float %b, float %c) nounwind readnone {
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entry:
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; CHECK-LABEL: FOO0float:
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; CHECK: madd.s
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%mul = fmul float %a, %b
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%add = fadd float %mul, %c
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%add1 = fadd float %add, 0.000000e+00
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ret float %add1
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}
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define float @FOO1float(float %a, float %b, float %c) nounwind readnone {
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entry:
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; CHECK-LABEL: FOO1float:
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; CHECK: msub.s
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%mul = fmul float %a, %b
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%sub = fsub float %mul, %c
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%add = fadd float %sub, 0.000000e+00
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ret float %add
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}
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define float @FOO2float(float %a, float %b, float %c) nounwind readnone {
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entry:
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; CHECK-LABEL: FOO2float:
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; 32R2: nmadd.s
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; 64R2: nmadd.s
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; 32R2NAN: madd.s
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; 64R2NAN: madd.s
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%mul = fmul float %a, %b
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%add = fadd float %mul, %c
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%sub = fsub float 0.000000e+00, %add
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ret float %sub
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}
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define float @FOO3float(float %a, float %b, float %c) nounwind readnone {
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entry:
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; CHECK-LABEL: FOO3float:
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; 32R2: nmsub.s
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; 64R2: nmsub.s
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; 32R2NAN: msub.s
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; 64R2NAN: msub.s
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%mul = fmul float %a, %b
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%sub = fsub float %mul, %c
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%sub1 = fsub float 0.000000e+00, %sub
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ret float %sub1
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}
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define double @FOO10double(double %a, double %b, double %c) nounwind readnone {
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entry:
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; CHECK-LABEL: FOO10double:
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; CHECK: madd.d
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%mul = fmul double %a, %b
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%add = fadd double %mul, %c
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%add1 = fadd double %add, 0.000000e+00
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ret double %add1
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}
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define double @FOO11double(double %a, double %b, double %c) nounwind readnone {
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entry:
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; CHECK-LABEL: FOO11double:
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; CHECK: msub.d
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%mul = fmul double %a, %b
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%sub = fsub double %mul, %c
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%add = fadd double %sub, 0.000000e+00
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ret double %add
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}
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define double @FOO12double(double %a, double %b, double %c) nounwind readnone {
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entry:
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; CHECK-LABEL: FOO12double:
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; 32R2: nmadd.d
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; 64R2: nmadd.d
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; 32R2NAN: madd.d
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; 64R2NAN: madd.d
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%mul = fmul double %a, %b
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%add = fadd double %mul, %c
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%sub = fsub double 0.000000e+00, %add
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ret double %sub
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}
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define double @FOO13double(double %a, double %b, double %c) nounwind readnone {
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entry:
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; CHECK-LABEL: FOO13double:
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; 32R2: nmsub.d
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; 64R2: nmsub.d
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; 32R2NAN: msub.d
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; 64R2NAN: msub.d
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%mul = fmul double %a, %b
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%sub = fsub double %mul, %c
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%sub1 = fsub double 0.000000e+00, %sub
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ret double %sub1
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}
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