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7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
2.2 KiB
C++
73 lines
2.2 KiB
C++
//===-- ARM64FixupKinds.h - ARM64 Specific Fixup Entries --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_ARM64FIXUPKINDS_H
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#define LLVM_ARM64FIXUPKINDS_H
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#include "llvm/MC/MCFixup.h"
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namespace llvm {
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namespace ARM64 {
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enum Fixups {
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// fixup_arm64_pcrel_adr_imm21 - A 21-bit pc-relative immediate inserted into
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// an ADR instruction.
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fixup_arm64_pcrel_adr_imm21 = FirstTargetFixupKind,
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// fixup_arm64_pcrel_adrp_imm21 - A 21-bit pc-relative immediate inserted into
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// an ADRP instruction.
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fixup_arm64_pcrel_adrp_imm21,
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// fixup_arm64_imm12 - 12-bit fixup for add/sub instructions.
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// No alignment adjustment. All value bits are encoded.
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fixup_arm64_add_imm12,
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// fixup_arm64_ldst_imm12_* - unsigned 12-bit fixups for load and
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// store instructions.
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fixup_arm64_ldst_imm12_scale1,
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fixup_arm64_ldst_imm12_scale2,
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fixup_arm64_ldst_imm12_scale4,
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fixup_arm64_ldst_imm12_scale8,
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fixup_arm64_ldst_imm12_scale16,
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// FIXME: comment
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fixup_arm64_movw,
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// fixup_arm64_pcrel_imm14 - The high 14 bits of a 21-bit pc-relative
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// immediate.
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fixup_arm64_pcrel_branch14,
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// fixup_arm64_pcrel_imm19 - The high 19 bits of a 21-bit pc-relative
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// immediate. Same encoding as fixup_arm64_pcrel_adrhi, except this
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// is not used as part of a lo/hi pair and thus generates relocations
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// directly when necessary.
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fixup_arm64_pcrel_imm19,
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// fixup_arm64_pcrel_branch26 - The high 26 bits of a 28-bit pc-relative
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// immediate.
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fixup_arm64_pcrel_branch26,
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// fixup_arm64_pcrel_call26 - The high 26 bits of a 28-bit pc-relative
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// immediate. Distinguished from branch26 only on ELF.
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fixup_arm64_pcrel_call26,
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// fixup_arm64_tlsdesc_call - zero-space placeholder for the ELF
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// R_AARCH64_TLSDESC_CALL relocation.
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fixup_arm64_tlsdesc_call,
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// Marker
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LastTargetFixupKind,
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NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
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};
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} // end namespace ARM64
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} // end namespace llvm
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#endif
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