Simon Pilgrim 5fd4fe08f6 [X86][SSE2] Just use an explicit SSE2 target attribute - not a cpu type. ...

corei7 is capable of a lot more than just SSE2.... 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241409 91177308-0d34-0410-b5e6-96231b3b80d8

2015-07-05 19:03:51 +00:00

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Analysis

[LazyCallGraph] Port test case from r240039 to LCG.

2015-07-02 02:03:58 +00:00

Assembler

Add a DIModule metadata node to the IR.

2015-06-29 23:03:47 +00:00

Bindings

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Bitcode

Fix for PR23310: llvm-dis crashes when trying to upgrade an intrinsic.

2015-07-02 16:22:40 +00:00

BugPoint

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CodeGen

[X86][SSE2] Just use an explicit SSE2 target attribute - not a cpu type.

2015-07-05 19:03:51 +00:00

DebugInfo

Revert "[DWARF] Fix debug info generation for function static variables, typedefs, and records"

2015-07-01 18:07:16 +00:00

ExecutionEngine

[RuntimeDyld] Skip relocations for external symbols with 64-bit address ~0ULL.

2015-07-04 01:35:26 +00:00

Feature

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FileCheck

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Instrumentation

[SanitizerCoverage] Don't add instrumentation to unreachable blocks.

2015-06-30 23:11:45 +00:00

Integer

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JitListener

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LibDriver

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Linker

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LTO

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MC

[x86][AVX512] add Multiply High Op

2015-07-05 12:23:20 +00:00

Object

[ELFYAML] Fix handling SHT_NOBITS sections by obj2yaml/yaml2obj tools

2015-07-03 23:00:54 +00:00

Other

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SymbolRewriter

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TableGen

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tools

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Transforms

Make an X86 specific directory and put the recent X86 tti specific

2015-07-02 01:36:31 +00:00

Unit

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Verifier

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YAMLParser

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.clang-format

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CMakeLists.txt

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lit.cfg

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lit.site.cfg.in

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Makefile

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Makefile.tests

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TestRunner.sh

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