llvm-6502/utils/TableGen
Chad Rosier 6018944afd Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164406 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21 19:25:59 +00:00
..
AsmMatcherEmitter.cpp Whitespace. 2012-09-21 19:25:59 +00:00
AsmWriterEmitter.cpp Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed. 2012-09-15 01:22:42 +00:00
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
CMakeLists.txt I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
CodeEmitterGen.cpp Re-work bit/bits value resolving in tblgen 2012-09-06 23:32:48 +00:00
CodeGenDAGPatterns.cpp Soften the pattern-can-never-match error in TableGen into a warning. This pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub). 2012-09-19 22:15:06 +00:00
CodeGenDAGPatterns.h Refactor Record* by-ID comparator to Record.h 2012-09-19 01:47:00 +00:00
CodeGenInstruction.cpp Improve tblgen code cleanliness: create an unknown_class, from which the unknown def inherits. Make tblgen check for that class, rather than checking for the def itself. 2012-09-11 23:47:08 +00:00
CodeGenInstruction.h Heed guessInstructionProperties, and stop warning on redundant flags. 2012-08-24 00:31:16 +00:00
CodeGenIntrinsics.h rdar://11542750 - llvm.trap should be marked no return. 2012-05-27 23:20:41 +00:00
CodeGenRegisters.cpp Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name. 2012-09-11 23:32:17 +00:00
CodeGenRegisters.h Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name. 2012-09-11 23:32:17 +00:00
CodeGenSchedule.cpp SchedMachineModel: compress the CPU's WriteLatencyTable. 2012-09-19 04:43:19 +00:00
CodeGenSchedule.h SchedMachineModel: compress the CPU's WriteLatencyTable. 2012-09-19 04:43:19 +00:00
CodeGenTarget.cpp Add in new data types that are used by AMDIL/ANL among others. 2012-09-19 22:47:07 +00:00
CodeGenTarget.h Add CodeGenTarget::guessInstructionProperties. 2012-08-23 19:34:41 +00:00
DAGISelEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
DAGISelMatcher.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
DAGISelMatcher.h Fix a typo (the the => the) 2012-07-23 08:51:15 +00:00
DAGISelMatcherEmitter.cpp Add 'virtual' keywoards to output file for overridden functions. 2012-09-16 18:25:36 +00:00
DAGISelMatcherGen.cpp Tablegen: Add OperandWithDefaultOps Operand type 2012-09-06 14:15:52 +00:00
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp Refactored DFA generator. Merged transition class into state class. 2012-09-07 21:35:43 +00:00
DisassemblerEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
EDEmitter.cpp Fix a couple of Doxygen comment issues pointed out by -Wdocumentation. 2012-09-12 16:59:47 +00:00
FastISelEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
FixedLenDecoderEmitter.cpp TableGen: Add initializer. 2012-09-17 18:00:53 +00:00
InstrInfoEmitter.cpp TableGen subtarget emitter. Use getSchedClassIdx. 2012-09-18 03:55:55 +00:00
IntrinsicEmitter.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
LLVMBuild.txt LLVMBuild: Remove trailing newline, which irked me. 2011-12-12 19:48:00 +00:00
Makefile
PseudoLoweringEmitter.cpp Fix typo 2012-09-17 04:43:39 +00:00
RegisterInfoEmitter.cpp Add 'virtual' keywoards to output file for overridden functions. 2012-09-16 16:35:22 +00:00
SequenceToOffsetTable.h Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed. 2012-09-15 01:22:42 +00:00
SetTheory.cpp Teach tblgen's set theory "sequence" operator to support an optional stride operand. 2012-05-24 21:37:08 +00:00
SetTheory.h Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
StringToOffsetTable.h Add some missing includes for the build against stdcxx. 2012-08-10 10:53:56 +00:00
SubtargetEmitter.cpp SchedMachineModel: compress the CPU's WriteLatencyTable. 2012-09-19 04:43:19 +00:00
TableGen.cpp Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
TableGenBackends.h Write llvm-tblgen backends as functions instead of sub-classes. 2012-06-11 15:37:55 +00:00
TGValueTypes.cpp Revert pragma clang suppressions that confuse GCC. (I'll worry about how to suppress/fix these problems properly when we figure out how to keep LLVM -Wweak-vtables clean) 2011-12-20 08:22:49 +00:00
X86DisassemblerShared.h Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. 2012-08-01 07:39:18 +00:00
X86DisassemblerTables.cpp Add a new compression type to ModRM table that detects when the memory modRM byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren. 2012-09-13 05:45:42 +00:00
X86DisassemblerTables.h Remove trailing whitespace 2012-07-31 05:28:41 +00:00
X86ModRMFilters.cpp Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch 2011-12-20 02:50:00 +00:00
X86ModRMFilters.h Fix Doxygen issues: 2012-09-13 12:34:29 +00:00
X86RecognizableInstr.cpp Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. 2012-09-19 06:37:45 +00:00
X86RecognizableInstr.h Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. 2012-09-19 06:37:45 +00:00