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https://github.com/c64scene-ar/llvm-6502.git
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3e59040810
Change current Hexagon MI scheduler to use new converging scheduler. Integrates DFA resource model into it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163137 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
491 B
LLVM
21 lines
491 B
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched -disable-hexagon-misched < %s | FileCheck %s
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@num = external global i32
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@acc = external global i32
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@val = external global i32
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; CHECK: memw(##num)
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; CHECK: memw(##acc)
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; CHECK: memw(##val)
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define void @foo() nounwind {
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entry:
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%0 = load i32* @num, align 4
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%1 = load i32* @acc, align 4
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%mul = mul nsw i32 %0, %1
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%2 = load i32* @val, align 4
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%add = add nsw i32 %mul, %2
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store i32 %add, i32* @num, align 4
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ret void
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}
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