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https://github.com/c64scene-ar/llvm-6502.git
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2ed2ad00f9
This fixes a bootstrapping problem with builds for Apple ARM targets. Clang had the wrong prototype for __clear_cache with ARM targets. Rafael fixed that in clang svn r181784 and r181810, but without those changes, we can't build this code for ARM because clang reports an error about the declaration in Memory.inc not matching the builtin declaration. Some of our buildbots need to use an older compiler that doesn't have the clang fix. Since __clear_cache is never used here when __APPLE__ is defined, I'm just conditionalizing the declaration to match that. I also moved the declaration of sys_icache_invalidate inside the conditional for __APPLE__ while I was at it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182223 91177308-0d34-0410-b5e6-96231b3b80d8
361 lines
11 KiB
C++
361 lines
11 KiB
C++
//===- Unix/Memory.cpp - Generic UNIX System Configuration ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines some functions for various memory management utilities.
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//
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//===----------------------------------------------------------------------===//
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#include "Unix.h"
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#include "llvm/Support/DataTypes.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Process.h"
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#ifdef HAVE_SYS_MMAN_H
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#include <sys/mman.h>
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#endif
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#ifdef __APPLE__
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#include <mach/mach.h>
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#endif
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#if defined(__mips__)
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# if defined(__OpenBSD__)
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# include <mips64/sysarch.h>
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# else
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# include <sys/cachectl.h>
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# endif
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#endif
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#ifdef __APPLE__
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extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
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#else
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extern "C" void __clear_cache(void *, void*);
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#endif
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namespace {
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int getPosixProtectionFlags(unsigned Flags) {
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switch (Flags) {
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case llvm::sys::Memory::MF_READ:
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return PROT_READ;
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case llvm::sys::Memory::MF_WRITE:
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return PROT_WRITE;
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case llvm::sys::Memory::MF_READ|llvm::sys::Memory::MF_WRITE:
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return PROT_READ | PROT_WRITE;
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case llvm::sys::Memory::MF_READ|llvm::sys::Memory::MF_EXEC:
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return PROT_READ | PROT_EXEC;
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case llvm::sys::Memory::MF_READ |
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llvm::sys::Memory::MF_WRITE |
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llvm::sys::Memory::MF_EXEC:
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return PROT_READ | PROT_WRITE | PROT_EXEC;
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case llvm::sys::Memory::MF_EXEC:
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#if defined(__FreeBSD__)
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// On PowerPC, having an executable page that has no read permission
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// can have unintended consequences. The function InvalidateInstruction-
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// Cache uses instructions dcbf and icbi, both of which are treated by
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// the processor as loads. If the page has no read permissions,
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// executing these instructions will result in a segmentation fault.
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// Somehow, this problem is not present on Linux, but it does happen
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// on FreeBSD.
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return PROT_READ | PROT_EXEC;
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#else
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return PROT_EXEC;
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#endif
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default:
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llvm_unreachable("Illegal memory protection flag specified!");
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}
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// Provide a default return value as required by some compilers.
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return PROT_NONE;
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}
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} // namespace
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namespace llvm {
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namespace sys {
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MemoryBlock
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Memory::allocateMappedMemory(size_t NumBytes,
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const MemoryBlock *const NearBlock,
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unsigned PFlags,
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error_code &EC) {
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EC = error_code::success();
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if (NumBytes == 0)
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return MemoryBlock();
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static const size_t PageSize = process::get_self()->page_size();
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const size_t NumPages = (NumBytes+PageSize-1)/PageSize;
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int fd = -1;
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#ifdef NEED_DEV_ZERO_FOR_MMAP
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static int zero_fd = open("/dev/zero", O_RDWR);
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if (zero_fd == -1) {
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EC = error_code(errno, system_category());
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return MemoryBlock();
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}
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fd = zero_fd;
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#endif
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int MMFlags = MAP_PRIVATE |
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#ifdef HAVE_MMAP_ANONYMOUS
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MAP_ANONYMOUS
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#else
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MAP_ANON
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#endif
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; // Ends statement above
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int Protect = getPosixProtectionFlags(PFlags);
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// Use any near hint and the page size to set a page-aligned starting address
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uintptr_t Start = NearBlock ? reinterpret_cast<uintptr_t>(NearBlock->base()) +
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NearBlock->size() : 0;
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if (Start && Start % PageSize)
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Start += PageSize - Start % PageSize;
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void *Addr = ::mmap(reinterpret_cast<void*>(Start), PageSize*NumPages,
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Protect, MMFlags, fd, 0);
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if (Addr == MAP_FAILED) {
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if (NearBlock) //Try again without a near hint
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return allocateMappedMemory(NumBytes, 0, PFlags, EC);
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EC = error_code(errno, system_category());
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return MemoryBlock();
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}
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MemoryBlock Result;
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Result.Address = Addr;
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Result.Size = NumPages*PageSize;
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if (PFlags & MF_EXEC)
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Memory::InvalidateInstructionCache(Result.Address, Result.Size);
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return Result;
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}
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error_code
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Memory::releaseMappedMemory(MemoryBlock &M) {
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if (M.Address == 0 || M.Size == 0)
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return error_code::success();
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if (0 != ::munmap(M.Address, M.Size))
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return error_code(errno, system_category());
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M.Address = 0;
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M.Size = 0;
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return error_code::success();
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}
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error_code
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Memory::protectMappedMemory(const MemoryBlock &M, unsigned Flags) {
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if (M.Address == 0 || M.Size == 0)
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return error_code::success();
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if (!Flags)
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return error_code(EINVAL, generic_category());
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int Protect = getPosixProtectionFlags(Flags);
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int Result = ::mprotect(M.Address, M.Size, Protect);
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if (Result != 0)
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return error_code(errno, system_category());
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if (Flags & MF_EXEC)
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Memory::InvalidateInstructionCache(M.Address, M.Size);
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return error_code::success();
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}
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/// AllocateRWX - Allocate a slab of memory with read/write/execute
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/// permissions. This is typically used for JIT applications where we want
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/// to emit code to the memory then jump to it. Getting this type of memory
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/// is very OS specific.
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///
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MemoryBlock
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Memory::AllocateRWX(size_t NumBytes, const MemoryBlock* NearBlock,
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std::string *ErrMsg) {
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if (NumBytes == 0) return MemoryBlock();
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size_t PageSize = process::get_self()->page_size();
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size_t NumPages = (NumBytes+PageSize-1)/PageSize;
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int fd = -1;
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#ifdef NEED_DEV_ZERO_FOR_MMAP
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static int zero_fd = open("/dev/zero", O_RDWR);
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if (zero_fd == -1) {
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MakeErrMsg(ErrMsg, "Can't open /dev/zero device");
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return MemoryBlock();
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}
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fd = zero_fd;
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#endif
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int flags = MAP_PRIVATE |
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#ifdef HAVE_MMAP_ANONYMOUS
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MAP_ANONYMOUS
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#else
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MAP_ANON
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#endif
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;
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void* start = NearBlock ? (unsigned char*)NearBlock->base() +
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NearBlock->size() : 0;
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#if defined(__APPLE__) && defined(__arm__)
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void *pa = ::mmap(start, PageSize*NumPages, PROT_READ|PROT_EXEC,
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flags, fd, 0);
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#else
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void *pa = ::mmap(start, PageSize*NumPages, PROT_READ|PROT_WRITE|PROT_EXEC,
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flags, fd, 0);
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#endif
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if (pa == MAP_FAILED) {
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if (NearBlock) //Try again without a near hint
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return AllocateRWX(NumBytes, 0);
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MakeErrMsg(ErrMsg, "Can't allocate RWX Memory");
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return MemoryBlock();
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}
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#if defined(__APPLE__) && defined(__arm__)
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kern_return_t kr = vm_protect(mach_task_self(), (vm_address_t)pa,
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(vm_size_t)(PageSize*NumPages), 0,
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VM_PROT_READ | VM_PROT_EXECUTE | VM_PROT_COPY);
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if (KERN_SUCCESS != kr) {
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MakeErrMsg(ErrMsg, "vm_protect max RX failed");
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return MemoryBlock();
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}
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kr = vm_protect(mach_task_self(), (vm_address_t)pa,
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(vm_size_t)(PageSize*NumPages), 0,
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VM_PROT_READ | VM_PROT_WRITE);
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if (KERN_SUCCESS != kr) {
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MakeErrMsg(ErrMsg, "vm_protect RW failed");
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return MemoryBlock();
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}
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#endif
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MemoryBlock result;
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result.Address = pa;
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result.Size = NumPages*PageSize;
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return result;
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}
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bool Memory::ReleaseRWX(MemoryBlock &M, std::string *ErrMsg) {
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if (M.Address == 0 || M.Size == 0) return false;
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if (0 != ::munmap(M.Address, M.Size))
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return MakeErrMsg(ErrMsg, "Can't release RWX Memory");
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return false;
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}
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bool Memory::setWritable (MemoryBlock &M, std::string *ErrMsg) {
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#if defined(__APPLE__) && defined(__arm__)
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if (M.Address == 0 || M.Size == 0) return false;
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Memory::InvalidateInstructionCache(M.Address, M.Size);
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kern_return_t kr = vm_protect(mach_task_self(), (vm_address_t)M.Address,
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(vm_size_t)M.Size, 0, VM_PROT_READ | VM_PROT_WRITE);
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return KERN_SUCCESS == kr;
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#else
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return true;
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#endif
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}
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bool Memory::setExecutable (MemoryBlock &M, std::string *ErrMsg) {
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#if defined(__APPLE__) && defined(__arm__)
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if (M.Address == 0 || M.Size == 0) return false;
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Memory::InvalidateInstructionCache(M.Address, M.Size);
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kern_return_t kr = vm_protect(mach_task_self(), (vm_address_t)M.Address,
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(vm_size_t)M.Size, 0, VM_PROT_READ | VM_PROT_EXECUTE | VM_PROT_COPY);
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return KERN_SUCCESS == kr;
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#elif defined(__arm__) || defined(__aarch64__)
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Memory::InvalidateInstructionCache(M.Address, M.Size);
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return true;
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#else
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return true;
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#endif
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}
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bool Memory::setRangeWritable(const void *Addr, size_t Size) {
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#if defined(__APPLE__) && defined(__arm__)
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kern_return_t kr = vm_protect(mach_task_self(), (vm_address_t)Addr,
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(vm_size_t)Size, 0,
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VM_PROT_READ | VM_PROT_WRITE);
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return KERN_SUCCESS == kr;
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#else
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return true;
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#endif
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}
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bool Memory::setRangeExecutable(const void *Addr, size_t Size) {
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#if defined(__APPLE__) && defined(__arm__)
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kern_return_t kr = vm_protect(mach_task_self(), (vm_address_t)Addr,
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(vm_size_t)Size, 0,
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VM_PROT_READ | VM_PROT_EXECUTE | VM_PROT_COPY);
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return KERN_SUCCESS == kr;
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#else
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return true;
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#endif
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}
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/// InvalidateInstructionCache - Before the JIT can run a block of code
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/// that has been emitted it must invalidate the instruction cache on some
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/// platforms.
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void Memory::InvalidateInstructionCache(const void *Addr,
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size_t Len) {
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// icache invalidation for PPC and ARM.
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#if defined(__APPLE__)
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# if (defined(__POWERPC__) || defined (__ppc__) || \
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defined(_POWER) || defined(_ARCH_PPC)) || defined(__arm__)
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sys_icache_invalidate(const_cast<void *>(Addr), Len);
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# endif
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#else
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# if (defined(__POWERPC__) || defined (__ppc__) || \
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defined(_POWER) || defined(_ARCH_PPC)) && defined(__GNUC__)
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const size_t LineSize = 32;
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const intptr_t Mask = ~(LineSize - 1);
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const intptr_t StartLine = ((intptr_t) Addr) & Mask;
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const intptr_t EndLine = ((intptr_t) Addr + Len + LineSize - 1) & Mask;
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for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
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asm volatile("dcbf 0, %0" : : "r"(Line));
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asm volatile("sync");
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for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
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asm volatile("icbi 0, %0" : : "r"(Line));
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asm volatile("isync");
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# elif (defined(__arm__) || defined(__aarch64__)) && defined(__GNUC__)
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// FIXME: Can we safely always call this for __GNUC__ everywhere?
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const char *Start = static_cast<const char *>(Addr);
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const char *End = Start + Len;
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__clear_cache(const_cast<char *>(Start), const_cast<char *>(End));
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# elif defined(__mips__)
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const char *Start = static_cast<const char *>(Addr);
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# if defined(ANDROID)
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// The declaration of "cacheflush" in Android bionic:
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// extern int cacheflush(long start, long end, long flags);
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const char *End = Start + Len;
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long LStart = reinterpret_cast<long>(const_cast<char *>(Start));
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long LEnd = reinterpret_cast<long>(const_cast<char *>(End));
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cacheflush(LStart, LEnd, BCACHE);
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# else
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cacheflush(const_cast<char *>(Start), Len, BCACHE);
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# endif
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# endif
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#endif // end apple
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ValgrindDiscardTranslations(Addr, Len);
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}
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} // namespace sys
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} // namespace llvm
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