llvm-6502/test/CodeGen/ARM/arm-returnaddr.ll
Jakob Stoklund Olesen ca6fd009ad Fix ARM tests to be register allocator independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128680 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 22:14:03 +00:00

30 lines
754 B
LLVM

; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=linearscan | FileCheck %s
; RUN: llc < %s -mtriple=thumbv6-apple-darwin -regalloc=linearscan | FileCheck %s
; rdar://8015977
; rdar://8020118
; This test needs the reserved register r7 to be coalesced into the ldr.
; So far, only linear scan can do that.
define i8* @rt0(i32 %x) nounwind readnone {
entry:
; CHECK: rt0:
; CHECK: {r7, lr}
; CHECK: mov r0, lr
%0 = tail call i8* @llvm.returnaddress(i32 0)
ret i8* %0
}
define i8* @rt2() nounwind readnone {
entry:
; CHECK: rt2:
; CHECK: {r7, lr}
; CHECK: ldr r[[R0:[0-9]+]], [r7]
; CHECK: ldr r0, [r0]
; CHECK: ldr r0, [r0, #4]
%0 = tail call i8* @llvm.returnaddress(i32 2)
ret i8* %0
}
declare i8* @llvm.returnaddress(i32) nounwind readnone