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https://github.com/c64scene-ar/llvm-6502.git
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83d886db3a
This builds on r217342, which added the infrastructure to compute known bits
using assumptions (@llvm.assume calls). That original commit added only a few
patterns (to catch common cases related to determining pointer alignment); this
change adds several other patterns for simple cases.
r217342 contained that, for assume(v & b = a), bits in the mask
that are known to be one, we can propagate known bits from the a to v. It also
had a known-bits transfer for assume(a = b). This patch adds:
assume(~(v & b) = a) : For those bits in the mask that are known to be one, we
can propagate inverted known bits from the a to v.
assume(v | b = a) : For those bits in b that are known to be zero, we can
propagate known bits from the a to v.
assume(~(v | b) = a): For those bits in b that are known to be zero, we can
propagate inverted known bits from the a to v.
assume(v ^ b = a) : For those bits in b that are known to be zero, we can
propagate known bits from the a to v. For those bits in
b that are known to be one, we can propagate inverted
known bits from the a to v.
assume(~(v ^ b) = a) : For those bits in b that are known to be zero, we can
propagate inverted known bits from the a to v. For those
bits in b that are known to be one, we can propagate
known bits from the a to v.
assume(v << c = a) : For those bits in a that are known, we can propagate them
to known bits in v shifted to the right by c.
assume(~(v << c) = a) : For those bits in a that are known, we can propagate
them inverted to known bits in v shifted to the right by c.
assume(v >> c = a) : For those bits in a that are known, we can propagate them
to known bits in v shifted to the right by c.
assume(~(v >> c) = a) : For those bits in a that are known, we can propagate
them inverted to known bits in v shifted to the right by c.
assume(v >=_s c) where c is non-negative: The sign bit of v is zero
assume(v >_s c) where c is at least -1: The sign bit of v is zero
assume(v <=_s c) where c is negative: The sign bit of v is one
assume(v <_s c) where c is non-positive: The sign bit of v is one
assume(v <=_u c): Transfer the known high zero bits
assume(v <_u c): Transfer the known high zero bits (if c is know to be a power
of 2, transfer one more)
A small addition to InstCombine was necessary for some of the test cases. The
problem is that when InstCombine was simplifying and, or, etc. it would fail to
check the 'do I know all of the bits' condition before checking less specific
conditions and would not fully constant-fold the result. I'm not sure how to
trigger this aside from using assumptions, so I've just included the change
here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217343 91177308-0d34-0410-b5e6-96231b3b80d8
175 lines
3.3 KiB
LLVM
175 lines
3.3 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; Function Attrs: nounwind
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declare void @llvm.assume(i1) #1
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; Function Attrs: nounwind uwtable
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define i32 @test1(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test1
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 5
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%and = and i32 %a, 15
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%cmp = icmp eq i32 %and, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 7
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ret i32 %and1
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}
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; Function Attrs: nounwind uwtable
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define i32 @test2(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test2
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 2
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%and = and i32 %a, 15
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%nand = xor i32 %and, -1
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%cmp = icmp eq i32 %nand, 4294967285
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 7
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ret i32 %and1
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}
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; Function Attrs: nounwind uwtable
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define i32 @test3(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test3
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 5
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%v = or i32 %a, 4294967280
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%cmp = icmp eq i32 %v, 4294967285
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 7
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ret i32 %and1
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}
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; Function Attrs: nounwind uwtable
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define i32 @test4(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test4
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 2
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%v = or i32 %a, 4294967280
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%nv = xor i32 %v, -1
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%cmp = icmp eq i32 %nv, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 7
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ret i32 %and1
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}
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; Function Attrs: nounwind uwtable
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define i32 @test5(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test5
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 4
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%v = xor i32 %a, 1
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%cmp = icmp eq i32 %v, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 7
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ret i32 %and1
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}
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; Function Attrs: nounwind uwtable
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define i32 @test6(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test6
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 5
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%v = shl i32 %a, 2
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%cmp = icmp eq i32 %v, 20
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 63
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ret i32 %and1
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}
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; Function Attrs: nounwind uwtable
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define i32 @test7(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test7
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 20
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%v = lshr i32 %a, 2
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%cmp = icmp eq i32 %v, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 252
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ret i32 %and1
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}
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; Function Attrs: nounwind uwtable
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define i32 @test8(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test8
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 20
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%v = lshr i32 %a, 2
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%cmp = icmp eq i32 %v, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 252
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ret i32 %and1
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}
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; Function Attrs: nounwind uwtable
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define i32 @test9(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test9
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 0
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%cmp = icmp sgt i32 %a, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 2147483648
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ret i32 %and1
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}
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; Function Attrs: nounwind uwtable
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define i32 @test10(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test10
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 -2147483648
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%cmp = icmp sle i32 %a, -2
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 2147483648
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ret i32 %and1
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}
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; Function Attrs: nounwind uwtable
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define i32 @test11(i32 %a) #0 {
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entry:
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; CHECK-LABEL: @test11
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; CHECK: call void @llvm.assume
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; CHECK: ret i32 0
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%cmp = icmp ule i32 %a, 256
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 3072
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ret i32 %and1
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}
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attributes #0 = { nounwind uwtable }
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attributes #1 = { nounwind }
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