llvm-6502/test/CodeGen
Andrea Di Biagio d4167d0b29 [X86] Add ISel patterns to select 'f32_to_f16' and 'f16_to_f32' dag nodes.
This patch adds tablegen patterns to select F16C float-to-half-float
conversion instructions from 'f32_to_f16' and 'f16_to_f32' dag nodes.

If the target doesn't have F16C, then 'f32_to_f16' and 'f16_to_f32'
are expanded into library calls.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212293 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-03 21:51:06 +00:00
..
AArch64 [aarch64] Add a test that should have been in r212242 but I forgot to 2014-07-03 02:12:26 +00:00
ARM [ARM] Implement ISB memory barrier intrinsic 2014-07-03 16:00:41 +00:00
CPP
Generic
Hexagon
Inputs
Mips Print a=b as an assignment. 2014-06-24 22:45:16 +00:00
MSP430
NVPTX [NVPTX] Add reflect intrinsic (better than matching by function name) 2014-06-27 18:36:11 +00:00
PowerPC Fix ppcf128 component access on little-endian systems 2014-07-03 15:06:47 +00:00
R600 R600: Promote i64 loads to v2i32 2014-07-02 20:53:54 +00:00
SPARC
SystemZ
Thumb
Thumb2 ARM: Fix TPsoft for Thumb mode 2014-06-24 15:45:59 +00:00
X86 [X86] Add ISel patterns to select 'f32_to_f16' and 'f16_to_f32' dag nodes. 2014-07-03 21:51:06 +00:00
XCore