llvm-6502/test/CodeGen
Juergen Ributzka af989653e0 [FastISel][AArch64] Also allow folding of sign-/zero-extend and shift-left for booleans (i1).
Shift-left immediate with sign-/zero-extensions also works for boolean values.
Update the assert and the test cases to reflect that fact.

This should fix a bug found by Chad.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218275 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-22 21:08:53 +00:00
..
AArch64 [FastISel][AArch64] Also allow folding of sign-/zero-extend and shift-left for booleans (i1). 2014-09-22 21:08:53 +00:00
ARM
CPP
Generic Fix crash with an insertvalue that produces an empty object. 2014-09-20 00:10:47 +00:00
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC
R600 Revert "R600/SI: Add support for global atomic add" 2014-09-22 16:44:04 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 [x86] Introduce tests covering the gamut of 256-bit vector shuffling. 2014-09-22 20:25:08 +00:00
XCore