llvm-6502/lib
Jiangning Liu 614fe873ce Fixed a bug in memory dependence checking module of loop vectorization. The following loop should not be vectorized with current algorithm.
{code}
// loop body
   ... = a[i]          (1)
    ... = a[i+1]       (2)
 .......
a[i+1] = ....          (3)
   a[i] = ...          (4)
{code}

The algorithm tries to collect memory access candidates from AliasSetTracker, and then check memory dependences one another. The memory accesses are unique in AliasSetTracker, and a single memory access in AliasSetTracker may map to multiple entries in AccessAnalysis, which could cover both 'read' and 'write'. Originally the algorithm only checked 'write' entry in Accesses if only 'write' exists. This is incorrect and the consequence is it ignored all read access, and finally some RAW and WAR dependence are missed.

For the case given above, if we ignore two reads, the dependence between (1) and (3) would not be able to be captured, and finally this loop will be incorrectly vectorized.

The fix simply inserts a new loop to find all entries in Accesses. Since it will skip most of all other memory accesses by checking the Value pointer at the very beginning of the loop, it should not increase compile-time visibly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225159 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-05 10:08:58 +00:00
..
Analysis [PM] Switch the new pass manager to use a reference-based API for IR 2015-01-05 02:47:05 +00:00
AsmParser
Bitcode [PM] Switch the new pass manager to use a reference-based API for IR 2015-01-05 02:47:05 +00:00
CodeGen [PowerPC/BlockPlacement] Allow target to provide a per-loop alignment preference 2015-01-03 17:58:24 +00:00
DebugInfo
ExecutionEngine RTDyldMemoryManager.cpp: Make the reference to __morestack weak. 2014-12-30 22:52:33 +00:00
IR [PM] Switch the new pass manager to use a reference-based API for IR 2015-01-05 02:47:05 +00:00
IRReader
LineEditor
Linker
LTO
MC Add r224985 back with a fix. 2014-12-31 17:19:34 +00:00
Object
Option
ProfileData
Support [APFloat][ADT] Fix sign handling logic for FMA results that truncate to zero. 2015-01-04 01:20:55 +00:00
TableGen
Target [X86] Remove the predicates from the register forms of the 2-byte inc and dec instructions. Remove the 32-bit mode only versions that existed for the disassembler. Move the patterns out of the instructions so they can still be qualified with predicates. 2015-01-05 08:19:12 +00:00
Transforms Fixed a bug in memory dependence checking module of loop vectorization. The following loop should not be vectorized with current algorithm. 2015-01-05 10:08:58 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile