llvm-6502/test/MC/X86/intel-syntax-unsized-memory.s
Ahmed Bougacha ad41590c48 [X86][MC] Intel syntax: accept implicit memory operand sizes larger than 80.
The X86AsmParser intel handling was refactored in r216481, making it
try each different memory operand size to see which one matches.
Operand sizes larger than 80 ("[xyz]mmword ptr") were forgotten, which
led to an "invalid operand" error for code such as:
  movdqa [rax], xmm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223187 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 02:03:26 +00:00

27 lines
637 B
ArmAsm

// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -mcpu=knl %s | FileCheck %s
// Check that we deduce unsized memory operands in the general, unambiguous, case.
// We can't deduce xword memory operands, because there is no instruction
// unambiguously accessing 80-bit memory.
// CHECK: movb %al, (%rax)
mov [rax], al
// CHECK: movw %ax, (%rax)
mov [rax], ax
// CHECK: movl %eax, (%rax)
mov [rax], eax
// CHECK: movq %rax, (%rax)
mov [rax], rax
// CHECK: movdqa %xmm0, (%rax)
movdqa [rax], xmm0
// CHECK: vmovdqa %ymm0, (%rax)
vmovdqa [rax], ymm0
// CHECK: vaddps (%rax), %zmm1, %zmm1
vaddps zmm1, zmm1, [rax]