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397fc4874e
The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156328 91177308-0d34-0410-b5e6-96231b3b80d8
70 lines
2.7 KiB
C++
70 lines
2.7 KiB
C++
//===- Thumb1RegisterInfo.h - Thumb-1 Register Information Impl -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Thumb-1 implementation of the TargetRegisterInfo
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// class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef THUMB1REGISTERINFO_H
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#define THUMB1REGISTERINFO_H
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#include "ARM.h"
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#include "ARMBaseRegisterInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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namespace llvm {
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class ARMSubtarget;
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class ARMBaseInstrInfo;
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struct Thumb1RegisterInfo : public ARMBaseRegisterInfo {
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public:
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Thumb1RegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &STI);
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const TargetRegisterClass*
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getLargestLegalSuperClass(const TargetRegisterClass *RC) const;
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const TargetRegisterClass*
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getPointerRegClass(const MachineFunction &MF, unsigned Kind = 0) const;
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/// emitLoadConstPool - Emits a load from constpool to materialize the
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/// specified immediate.
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void emitLoadConstPool(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MBBI,
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DebugLoc dl,
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unsigned DestReg, unsigned SubIdx, int Val,
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ARMCC::CondCodes Pred = ARMCC::AL,
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unsigned PredReg = 0,
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unsigned MIFlags = MachineInstr::NoFlags) const;
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/// Code Generation virtual methods...
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const;
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// rewrite MI to access 'Offset' bytes from the FP. Update Offset to be
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// however much remains to be handled. Return 'true' if no further
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// work is required.
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bool rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
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unsigned FrameReg, int &Offset,
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const ARMBaseInstrInfo &TII) const;
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void resolveFrameIndex(MachineBasicBlock::iterator I,
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unsigned BaseReg, int64_t Offset) const;
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bool saveScavengerRegister(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator &UseMI,
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const TargetRegisterClass *RC,
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unsigned Reg) const;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, RegScavenger *RS = NULL) const;
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};
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}
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#endif // THUMB1REGISTERINFO_H
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