llvm-6502/test/CodeGen
Cameron Zwarich d78ebe1e12 Remove a check from ARM shifted operand isel helper methods, which were blocking
merging an lsl #2 that has multiple uses on A9. This shift is free, so there is
no problem merging it in multiple places. Other unprofitable shifts will not be
merged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 23:38:50 +00:00
..
Alpha Convert more tests over to the new atomic instructions. 2011-09-26 21:30:17 +00:00
ARM Remove a check from ARM shifted operand isel helper methods, which were blocking 2011-10-05 23:38:50 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic
MBlaze
Mips Move CHECK after entry label. 2011-10-03 21:24:30 +00:00
MSP430
PowerPC Convert more tests over to the new atomic instructions. 2011-09-26 21:30:17 +00:00
PTX PTX: Add new patterns for bitconvert and any_extend 2011-09-29 01:13:12 +00:00
SPARC
SystemZ
Thumb Convert more tests to new atomic instructions. 2011-09-26 21:36:10 +00:00
Thumb2 ARM Darwin default relocation model is PIC. 2011-09-30 17:41:35 +00:00
X86 Filecheck-ize. 2011-09-30 23:40:29 +00:00
XCore