mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 04:30:12 +00:00
0f39827340
We were ignoring the ordered/onordered bits and also the signed/unsigned bits of condition codes when lowering the DAG to MachineInstrs. NOTE: This is a candidate for the 3.4 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195514 91177308-0d34-0410-b5e6-96231b3b80d8
334 lines
7.8 KiB
LLVM
334 lines
7.8 KiB
LLVM
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
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;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI --check-prefix=FUNC %s
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; FUNC-LABEL: @setcc_v2i32
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[3].X, KC0[3].Z
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[2].W, KC0[3].Y
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define void @setcc_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, <2 x i32> %b) {
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%result = icmp eq <2 x i32> %a, %b
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%sext = sext <2 x i1> %result to <2 x i32>
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store <2 x i32> %sext, <2 x i32> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @setcc_v4i32
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define void @setcc_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
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%a = load <4 x i32> addrspace(1) * %in
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%b = load <4 x i32> addrspace(1) * %b_ptr
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%result = icmp eq <4 x i32> %a, %b
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%sext = sext <4 x i1> %result to <4 x i32>
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store <4 x i32> %sext, <4 x i32> addrspace(1)* %out
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ret void
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}
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;;;==========================================================================;;;
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;; Float comparisons
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;;;==========================================================================;;;
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; FUNC-LABEL: @f32_oeq
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; R600: SETE_DX10
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; SI: V_CMP_EQ_F32
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define void @f32_oeq(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp oeq float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_ogt
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; R600: SETGT_DX10
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; SI: V_CMP_GT_F32
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define void @f32_ogt(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ogt float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_oge
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; R600: SETGE_DX10
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; SI: V_CMP_GE_F32
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define void @f32_oge(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp oge float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_olt
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; R600: SETGT_DX10
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; SI: V_CMP_LT_F32
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define void @f32_olt(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp olt float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_ole
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; R600: SETGE_DX10
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; SI: V_CMP_LE_F32
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define void @f32_ole(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ole float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_one
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; R600-DAG: SETE_DX10
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; R600-DAG: SETE_DX10
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; R600-DAG: AND_INT
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; R600-DAG: SETNE_DX10
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; R600-DAG: AND_INT
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; R600-DAG: SETNE_INT
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; SI: V_CMP_O_F32
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; SI: V_CMP_NEQ_F32
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; SI: S_AND_B64
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define void @f32_one(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp one float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_ord
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; R600-DAG: SETE_DX10
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; R600-DAG: SETE_DX10
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; R600-DAG: AND_INT
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; R600-DAG: SETNE_INT
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; SI: V_CMP_O_F32
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define void @f32_ord(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ord float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_ueq
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; R600-DAG: SETNE_DX10
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; R600-DAG: SETNE_DX10
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; R600-DAG: OR_INT
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; R600-DAG: SETE_DX10
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; R600-DAG: OR_INT
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; R600-DAG: SETNE_INT
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; SI: V_CMP_U_F32
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; SI: V_CMP_EQ_F32
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; SI: S_OR_B64
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define void @f32_ueq(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ueq float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_ugt
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; R600: SETGE
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; R600: SETE_DX10
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; SI: V_CMP_U_F32
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; SI: V_CMP_GT_F32
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; SI: S_OR_B64
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define void @f32_ugt(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ugt float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_uge
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; R600: SETGT
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; R600: SETE_DX10
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; SI: V_CMP_U_F32
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; SI: V_CMP_GE_F32
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; SI: S_OR_B64
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define void @f32_uge(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp uge float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_ult
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; R600: SETGE
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; R600: SETE_DX10
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; SI: V_CMP_U_F32
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; SI: V_CMP_LT_F32
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; SI: S_OR_B64
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define void @f32_ult(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ult float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_ule
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; R600: SETGT
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; R600: SETE_DX10
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; SI: V_CMP_U_F32
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; SI: V_CMP_LE_F32
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; SI: S_OR_B64
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define void @f32_ule(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp ule float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_une
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; R600: SETNE_DX10
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; SI: V_CMP_NEQ_F32
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define void @f32_une(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp une float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @f32_uno
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; R600: SETNE_DX10
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; R600: SETNE_DX10
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; R600: OR_INT
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; R600: SETNE_INT
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; SI: V_CMP_U_F32
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define void @f32_uno(i32 addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fcmp uno float %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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;;;==========================================================================;;;
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;; 32-bit integer comparisons
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;;;==========================================================================;;;
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; FUNC-LABEL: @i32_eq
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; R600: SETE_INT
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; SI: V_CMP_EQ_I32
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define void @i32_eq(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp eq i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @i32_ne
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; R600: SETNE_INT
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; SI: V_CMP_NE_I32
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define void @i32_ne(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ne i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @i32_ugt
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; R600: SETGT_UINT
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; SI: V_CMP_GT_U32
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define void @i32_ugt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ugt i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @i32_uge
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; R600: SETGE_UINT
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; SI: V_CMP_GE_U32
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define void @i32_uge(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp uge i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @i32_ult
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; R600: SETGT_UINT
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; SI: V_CMP_LT_U32
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define void @i32_ult(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ult i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @i32_ule
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; R600: SETGE_UINT
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; SI: V_CMP_LE_U32
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define void @i32_ule(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp ule i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @i32_sgt
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; R600: SETGT_INT
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; SI: V_CMP_GT_I32
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define void @i32_sgt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp sgt i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @i32_sge
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; R600: SETGE_INT
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; SI: V_CMP_GE_I32
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define void @i32_sge(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp sge i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @i32_slt
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; R600: SETGT_INT
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; SI: V_CMP_LT_I32
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define void @i32_slt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp slt i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @i32_sle
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; R600: SETGE_INT
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; SI: V_CMP_LE_I32
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define void @i32_sle(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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%0 = icmp sle i32 %a, %b
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%1 = sext i1 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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