Chandler Carruth 62ba2b29d8 [x86] Add a slight variation on some of the other generic shuffle ... lowerings -- one which decomposes into an initial blend followed by a permute. Particularly on newer chips, blends are handled independently of shuffles and so this is much less bottlenecked on the single port that floating point shuffles are executed with on Intel. I'll be adding this lowering to a bunch of other code paths in subsequent commits to handle still more places where we can effectively leverage blends when they're available in the ISA. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229292 91177308-0d34-0410-b5e6-96231b3b80d8		2015-02-15 08:26:30 +00:00
..
AArch64	[SimplifyCFG] Be more aggressive	2015-02-13 10:48:30 +00:00
ARM	[SimplifyCFG] Swap to using TargetTransformInfo for cost	2015-02-11 12:15:41 +00:00
BPF
CPP
Generic
Hexagon	[Hexagon] Factoring classes out of store patterns.	2015-02-09 20:33:46 +00:00
Inputs
Mips	[mips][microMIPS] Delay slot filler: Replace the microMIPS JR with the JRC	2015-02-13 17:51:27 +00:00
MSP430
NVPTX
PowerPC	[CodeGenPrepare] Removed duplicate logic. SimplifyCFG already knows how to speculate calls to cttz/ctlz.	2015-02-13 14:15:48 +00:00
R600	R600/SI: Implement correct f64 fdiv	2015-02-14 04:30:08 +00:00
SPARC
SystemZ
Thumb
Thumb2	Make buildbots better.	2015-02-11 12:24:09 +00:00
X86	[x86] Add a slight variation on some of the other generic shuffle	2015-02-15 08:26:30 +00:00
XCore