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llvm-6502/test/Bitcode/neon-intrinsics.ll.bc
Bob Wilson b31a11b466 Replace the arm.neon.vmovls and vmovlu intrinsics with vector sign-extend and 
zero-extend operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-20 04:54:02 +00:00

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