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https://github.com/c64scene-ar/llvm-6502.git
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33ff5aeaa8
Generate code for Mips32r1 unless a Mips32r2 feature is tested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139433 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
939 B
LLVM
Executable File
33 lines
939 B
LLVM
Executable File
; RUN: llc -march=mips < %s | FileCheck %s
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; RUN: llc -march=mips -regalloc=basic < %s | FileCheck %s
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@i1 = global [3 x i32] [i32 1, i32 2, i32 3], align 4
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@i3 = common global i32* null, align 4
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; CHECK: addiu ${{[0-9]+}}, $gp, %got(i1)
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; CHECK: lw ${{[0-9]+}}, %got(i3)($gp)
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define i32* @cmov1(i32 %s) nounwind readonly {
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entry:
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%tobool = icmp ne i32 %s, 0
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%tmp1 = load i32** @i3, align 4
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%cond = select i1 %tobool, i32* getelementptr inbounds ([3 x i32]* @i1, i32 0, i32 0), i32* %tmp1
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ret i32* %cond
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}
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@c = global i32 1, align 4
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@d = global i32 0, align 4
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; CHECK: cmov2:
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; CHECK: addiu $[[R0:[0-9]+]], $gp, %got(c)
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; CHECK: addiu $[[R1:[0-9]+]], $gp, %got(d)
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; CHECK: movn $[[R1]], $[[R0]], ${{[0-9]+}}
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define i32 @cmov2(i32 %s) nounwind readonly {
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entry:
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%tobool = icmp ne i32 %s, 0
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%tmp1 = load i32* @c, align 4
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%tmp2 = load i32* @d, align 4
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%cond = select i1 %tobool, i32 %tmp1, i32 %tmp2
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ret i32 %cond
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}
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