Vincent Lejeune 631591e6f3 R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions ... v2[Vincent Lejeune]: Split FetchInst into usesTextureCache/usesVertexCache git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180755 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-30 00:13:39 +00:00
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AArch64	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
ARM	TBAA: remove !tbaa from testing cases if not used.	2013-04-29 22:58:55 +00:00
CPP	test commit: remove blank line.	2013-03-14 05:43:59 +00:00
Generic	XFAIL some of the generic CodeGen tests for Hexagon.	2013-03-25 21:04:16 +00:00
Hexagon	Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.	2013-04-23 21:17:40 +00:00
Inputs	Revert "Adding DIImportedModules to DIScopes."	2013-03-28 02:44:59 +00:00
MBlaze	Remove unnecessary leading comment characters in lit-only file	2013-03-18 22:08:16 +00:00
Mips	[mips] In performDSPShiftCombine, check that all elements in the vector are	2013-04-22 19:58:23 +00:00
MSP430	Remove unnecessary leading comment characters in lit-only file	2013-03-18 22:08:16 +00:00
NVPTX	[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.	2013-03-30 14:29:30 +00:00
PowerPC	Make all darwin ppc stubs local.	2013-04-27 00:43:16 +00:00
R600	R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions	2013-04-30 00:13:39 +00:00
SI	Add R600 backend	2012-12-11 21:25:42 +00:00
SPARC	Cleanup: test source files do not need to be executable	2013-04-22 08:02:43 +00:00
Thumb	Revert "Adding DIImportedModules to DIScopes."	2013-03-28 02:44:59 +00:00
Thumb2	SDAG: Handle scalarizing an extend of a <1 x iN> vector.	2013-03-07 05:47:54 +00:00
X86	Rewrite test in FileCheck instead of grep in X86 codegen	2013-04-30 00:13:38 +00:00
XCore	[XCore] Extend test to check positve offsets are folded into addresses.	2013-04-16 20:05:52 +00:00