mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-10-31 09:11:13 +00:00
2182c785c2
* Reduce number of #includes, sometimes drastically (LiveRangeInfo.h lost _7_) * Move instrIsFeasible() from InstrScheduling.h to SchedPriorities.h * Delete blank lines at end of files git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1672 91177308-0d34-0410-b5e6-96231b3b80d8
131 lines
4.9 KiB
C++
131 lines
4.9 KiB
C++
// $Id$ -*-c++-*-
|
|
//***************************************************************************
|
|
// File:
|
|
// InstrSelectionSupport.h
|
|
//
|
|
// Purpose:
|
|
// Target-independent instruction selection code.
|
|
// See SparcInstrSelection.cpp for usage.
|
|
//
|
|
// History:
|
|
// 10/10/01 - Vikram Adve - Created
|
|
//**************************************************************************/
|
|
|
|
#ifndef LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
|
|
#define LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
|
|
|
|
#include "llvm/Instruction.h"
|
|
#include "llvm/CodeGen/MachineInstr.h"
|
|
class InstructionNode;
|
|
class TargetMachine;
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
// Function GetConstantValueAsSignedInt
|
|
//
|
|
// Convenience function to get the value of an integer constant, for an
|
|
// appropriate integer or non-integer type that can be held in an integer.
|
|
// The type of the argument must be the following:
|
|
// Signed or unsigned integer
|
|
// Boolean
|
|
// Pointer
|
|
//
|
|
// isValidConstant is set to true if a valid constant was found.
|
|
//---------------------------------------------------------------------------
|
|
|
|
int64_t GetConstantValueAsSignedInt (const Value *V,
|
|
bool &isValidConstant);
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
// Function: FoldGetElemChain
|
|
//
|
|
// Purpose:
|
|
// Fold a chain of GetElementPtr instructions into an equivalent
|
|
// (Pointer, IndexVector) pair. Returns the pointer Value, and
|
|
// stores the resulting IndexVector in argument chainIdxVec.
|
|
//---------------------------------------------------------------------------
|
|
|
|
Value* FoldGetElemChain (const InstructionNode* getElemInstrNode,
|
|
std::vector<Value*>& chainIdxVec);
|
|
|
|
|
|
//------------------------------------------------------------------------
|
|
// Function Set2OperandsFromInstr
|
|
// Function Set3OperandsFromInstr
|
|
//
|
|
// Purpose:
|
|
//
|
|
// For the common case of 2- and 3-operand arithmetic/logical instructions,
|
|
// set the m/c instr. operands directly from the VM instruction's operands.
|
|
// Check whether the first or second operand is 0 and can use a dedicated
|
|
// "0" register.
|
|
// Check whether the second operand should use an immediate field or register.
|
|
// (First and third operands are never immediates for such instructions.)
|
|
//
|
|
// Arguments:
|
|
// canDiscardResult: Specifies that the result operand can be discarded
|
|
// by using the dedicated "0"
|
|
//
|
|
// op1position, op2position and resultPosition: Specify in which position
|
|
// in the machine instruction the 3 operands (arg1, arg2
|
|
// and result) should go.
|
|
//
|
|
// RETURN VALUE: unsigned int flags, where
|
|
// flags & 0x01 => operand 1 is constant and needs a register
|
|
// flags & 0x02 => operand 2 is constant and needs a register
|
|
//------------------------------------------------------------------------
|
|
|
|
void Set2OperandsFromInstr (MachineInstr* minstr,
|
|
InstructionNode* vmInstrNode,
|
|
const TargetMachine& targetMachine,
|
|
bool canDiscardResult = false,
|
|
int op1Position = 0,
|
|
int resultPosition = 1);
|
|
|
|
void Set3OperandsFromInstr (MachineInstr* minstr,
|
|
InstructionNode* vmInstrNode,
|
|
const TargetMachine& targetMachine,
|
|
bool canDiscardResult = false,
|
|
int op1Position = 0,
|
|
int op2Position = 1,
|
|
int resultPosition = 2);
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
// Function: ChooseRegOrImmed
|
|
//
|
|
// Purpose:
|
|
//
|
|
//---------------------------------------------------------------------------
|
|
|
|
MachineOperand::MachineOperandType ChooseRegOrImmed(
|
|
Value* val,
|
|
MachineOpCode opCode,
|
|
const TargetMachine& targetMachine,
|
|
bool canUseImmed,
|
|
unsigned int& getMachineRegNum,
|
|
int64_t& getImmedValue);
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
|
// Function: FixConstantOperandsForInstr
|
|
//
|
|
// Purpose:
|
|
// Special handling for constant operands of a machine instruction
|
|
// -- if the constant is 0, use the hardwired 0 register, if any;
|
|
// -- if the constant fits in the IMMEDIATE field, use that field;
|
|
// -- else create instructions to put the constant into a register, either
|
|
// directly or by loading explicitly from the constant pool.
|
|
//
|
|
// In the first 2 cases, the operand of `minstr' is modified in place.
|
|
// Returns a vector of machine instructions generated for operands that
|
|
// fall under case 3; these must be inserted before `minstr'.
|
|
//---------------------------------------------------------------------------
|
|
|
|
std::vector<MachineInstr*> FixConstantOperandsForInstr (Instruction* vmInstr,
|
|
MachineInstr* minstr,
|
|
TargetMachine& target);
|
|
|
|
#endif
|