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https://github.com/c64scene-ar/llvm-6502.git
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a4959f3f6e
-Assembly parser now properly check the size of the memory operation specified in intel syntax. So 'mov word ptr [5], al' is no longer accepted. -x86-32 disassembly of these instructions no longer sign extends the 32-bit address immediate based on size. -Intel syntax printing prints the ptr size and places brackets around the address immediate. Known remaining issues with these instructions: -Segment override prefix is not supported. PR16962 and PR16961. -Immediate size should be changed by address size prefix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189201 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
669 B
Plaintext
32 lines
669 B
Plaintext
# RUN: llvm-mc --disassemble %s -triple=i386 --output-asm-variant=1 | FileCheck %s
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# CHECK: sgdt opaque ptr [eax]
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0x0f 0x01 0x00
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# CHECK: sidt opaque ptr [eax]
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0x0f 0x01 0x08
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# CHECK: lgdt opaque ptr [eax]
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0x0f 0x01 0x10
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# CHECK: lidt opaque ptr [eax]
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0x0f 0x01 0x18
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# CHECK: mov al, byte ptr [878082192]
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0xa0 0x90 0x78 0x56 0x34
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# CHECK: mov ax, word ptr [878082192]
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0x66 0xa1 0x90 0x78 0x56 0x34
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# CHECK: mov eax, dword ptr [878082192]
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0xa1 0x90 0x78 0x56 0x34
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# CHECK: mov byte ptr [878082192], al
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0xa2 0x90 0x78 0x56 0x34
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# CHECK: mov word ptr [878082192], ax
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0x66 0xa3 0x90 0x78 0x56 0x34
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# CHECK: mov dword ptr [878082192], eax
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0xa3 0x90 0x78 0x56 0x34
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