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https://github.com/c64scene-ar/llvm-6502.git
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638e4c13cb
It had patterns for zext-loading and extending. This commit adds patterns for loading a wide type, performing a bitcast, and extending. This is an odd pattern, but it is commonly used when writing code with intrinsics. rdar://11897677 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163995 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
740 B
LLVM
23 lines
740 B
LLVM
; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s
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; rdar://11897677
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;CHECK: intrin_pmov
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;CHECK: pmovzxbw (%rsi), %xmm0
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;CHECK-NEXT: movdqu
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;CHECK-NEXT: ret
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define void @intrin_pmov(i16* noalias %dest, i8* noalias %src) nounwind uwtable ssp {
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%1 = bitcast i8* %src to <2 x i64>*
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%2 = load <2 x i64>* %1, align 16
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%3 = bitcast <2 x i64> %2 to <16 x i8>
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%4 = tail call <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8> %3) nounwind
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%5 = bitcast i16* %dest to i8*
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%6 = bitcast <8 x i16> %4 to <16 x i8>
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tail call void @llvm.x86.sse2.storeu.dq(i8* %5, <16 x i8> %6) nounwind
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ret void
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}
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declare <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8>) nounwind readnone
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declare void @llvm.x86.sse2.storeu.dq(i8*, <16 x i8>) nounwind
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