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The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156328 91177308-0d34-0410-b5e6-96231b3b80d8
107 lines
3.8 KiB
C++
107 lines
3.8 KiB
C++
//===-- SPURegisterInfo.h - Cell SPU Register Information Impl --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Cell SPU implementation of the TargetRegisterInfo
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// class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPU_REGISTERINFO_H
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#define SPU_REGISTERINFO_H
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#include "SPU.h"
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#define GET_REGINFO_HEADER
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#include "SPUGenRegisterInfo.inc"
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namespace llvm {
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class SPUSubtarget;
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class TargetInstrInfo;
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class Type;
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class SPURegisterInfo : public SPUGenRegisterInfo {
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private:
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const SPUSubtarget &Subtarget;
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const TargetInstrInfo &TII;
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//! Predicate: Does the machine function use the link register?
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bool usesLR(MachineFunction &MF) const;
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public:
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SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii);
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//! Translate a register's enum value to a register number
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/*!
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This method translates a register's enum value to it's regiser number,
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e.g. SPU::R14 -> 14.
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*/
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static unsigned getRegisterNumbering(unsigned RegEnum);
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// This is used for addressing modes.
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virtual const TargetRegisterClass *
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getPointerRegClass(const MachineFunction &MF, unsigned Kind = 0) const;
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/// After allocating this many registers, the allocator should feel
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/// register pressure. The value is a somewhat random guess, based on the
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/// number of non callee saved registers in the C calling convention.
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virtual unsigned getRegPressureLimit( const TargetRegisterClass *RC,
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MachineFunction &MF) const{
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return 50;
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}
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//! Return the array of callee-saved registers
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virtual const uint16_t* getCalleeSavedRegs(const MachineFunction *MF) const;
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//! Allow for scavenging, so we can get scratch registers when needed.
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virtual bool requiresRegisterScavenging(const MachineFunction &MF) const
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{ return true; }
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//! Enable tracking of liveness after register allocation, since register
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// scavenging is enabled.
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virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const
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{ return true; }
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//! Return the reserved registers
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BitVector getReservedRegs(const MachineFunction &MF) const;
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//! Eliminate the call frame setup pseudo-instructions
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const;
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//! Convert frame indicies into machine operands
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void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
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RegScavenger *RS = NULL) const;
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//! Get the stack frame register (SP, aka R1)
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unsigned getFrameRegister(const MachineFunction &MF) const;
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//------------------------------------------------------------------------
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// New methods added:
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//------------------------------------------------------------------------
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//! Convert D-form load/store to X-form load/store
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/*!
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Converts a regiser displacement load/store into a register-indexed
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load/store for large stack frames, when the stack frame exceeds the
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range of a s10 displacement.
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*/
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int convertDFormToXForm(int dFormOpcode) const;
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//! Acquire an unused register in an emergency.
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unsigned findScratchRegister(MachineBasicBlock::iterator II,
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RegScavenger *RS,
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const TargetRegisterClass *RC,
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int SPAdj) const;
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};
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} // end namespace llvm
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#endif
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