llvm-6502/lib/Transforms
Evgeniy Stepanov 63cca4e2fd [msan] Origin stores and loads do not need explicit alignment.
Origin address is always 4 byte aligned, and the access type is always i32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 13:43:11 +00:00
..
Hello Use the new script to sort the includes of every file under lib. 2012-12-03 16:50:05 +00:00
InstCombine Revert r170020, "Simplify negated bit test", for now. 2012-12-13 14:28:16 +00:00
Instrumentation [msan] Origin stores and loads do not need explicit alignment. 2012-12-14 13:43:11 +00:00
IPO revert r170166 - disable the loop vectorizer. 2012-12-14 01:57:00 +00:00
Scalar Revert EVT->MVT changes, r169836-169851, due to buildbot failures. 2012-12-11 11:14:33 +00:00
Utils Improve debug info generated with enabled AddressSanitizer. 2012-12-12 14:31:53 +00:00
Vectorize Enable the Loop Vectorizer by default for O2 and O3. Disable if-conversion by default. I plan to revert this patch later today. 2012-12-13 23:11:54 +00:00
CMakeLists.txt Add a basic-block autovectorization pass. 2012-02-01 03:51:43 +00:00
LLVMBuild.txt Add a basic-block autovectorization pass. 2012-02-01 03:51:43 +00:00
Makefile Add a basic-block autovectorization pass. 2012-02-01 03:51:43 +00:00