llvm-6502/test/CodeGen
Alex Lorenz d986612a1a MIR Serialization: Serialize global address machine operands.
This commit serializes the global address machine operands.
This commit doesn't serialize the operand's offset and target
flags, it serializes only the global value reference.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10671


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240851 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 22:56:48 +00:00
..
AArch64 [AArch64] Lower interleaved memory accesses to ldN/stN intrinsics. This patch also adds a function to calculate the cost of interleaved memory accesses. 2015-06-26 02:32:07 +00:00
AMDGPU AMDPGU/SI: Use correct resource descriptors for VI on HSA 2015-06-26 21:58:42 +00:00
ARM [ARM] Cortex-R5 is not VFPOnlySP 2015-06-26 17:42:37 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips
MIR MIR Serialization: Serialize global address machine operands. 2015-06-26 22:56:48 +00:00
MSP430
NVPTX [NVPTX] noop when kernel pointers are already global 2015-06-26 22:35:43 +00:00
PowerPC Add missing builtins to the PPC back end for ABI compliance (vol. 1) 2015-06-26 19:26:53 +00:00
SPARC
SystemZ
Thumb
Thumb2 ARMLoadStoreOptimizer: Fix errata 602117 handling and make testcase actually test for it 2015-06-24 20:03:27 +00:00
WinEH [Verifier] Verify invokes of intrinsics 2015-06-26 21:39:44 +00:00
X86 Revert "Revert r240762 "[X86] Cleanup X86WindowsTargetObjectFile::getSectionForConstant"" 2015-06-26 18:55:48 +00:00
XCore