llvm-6502/lib/CodeGen/SelectionDAG
Oliver Stannard 5e487f8dc7 Teach the AArch64 backend about v4f16 and v8f16
This teaches the AArch64 backend to deal with the operations required
to deal with the operations on v4f16 and v8f16 which are exposed by
NEON intrinsics, plus the add, sub, mul and div operations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216555 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-27 16:16:04 +00:00
..
CMakeLists.txt
DAGCombiner.cpp
FastISel.cpp
FunctionLoweringInfo.cpp
InstrEmitter.cpp
InstrEmitter.h
LegalizeDAG.cpp [SDAG] Re-instate r215611 with a fix to a pesky X86 DAG combine. 2014-08-27 11:22:16 +00:00
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp
LegalizeTypes.cpp
LegalizeTypes.h
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
LegalizeVectorTypes.cpp
LLVMBuild.txt
Makefile
ResourcePriorityQueue.cpp
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp
ScheduleDAGSDNodes.h
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h
SelectionDAG.cpp
SelectionDAGBuilder.cpp
SelectionDAGBuilder.h
SelectionDAGDumper.cpp
SelectionDAGISel.cpp
SelectionDAGPrinter.cpp
TargetLowering.cpp
TargetSelectionDAGInfo.cpp