llvm-6502/test/CodeGen
2011-06-25 02:44:56 +00:00
..
Alpha
ARM The Neon VCVT (between floating-point and fixed-point, Advanced SIMD) 2011-06-24 19:23:04 +00:00
Blackfin Remove support for parsing the "type i32" syntax for defining a numbered 2011-06-19 00:03:46 +00:00
CBackend Add support for sadd.with.overflow and uadd.with.overflow intrinsics to the CBackend by emitting definitions for each intrinsic that occurs in the module. 2011-06-21 17:18:15 +00:00
CellSPU
CPP
Generic Handle debug info for i128 constants. 2011-06-24 20:46:11 +00:00
MBlaze
Mips Change the chain input of nodes that load the address of a function. This change 2011-06-24 19:01:25 +00:00
MSP430
PowerPC Don't apply on PPC64 the 32bit ADDIC optimizations as there's no overflow 2011-06-20 15:28:39 +00:00
PTX PTX: Add support for i8 type and introduce associated .b8 registers 2011-06-24 19:27:10 +00:00
SPARC
SystemZ
Thumb
Thumb2 Remove support for parsing the "type i32" syntax for defining a numbered 2011-06-19 00:03:46 +00:00
X86 Test case for r133858 (tail call optimize in the presence of byval). 2011-06-25 02:44:56 +00:00
XCore