llvm-6502/lib/Target
Nate Begeman 645495d2e6 Fix the last of the major PPC GEP folding deficiencies. This will allow
the ISel to use indexed and non-zero immediate offsets for GEPs that have
more than one use.  This is common for instruction sequences such as a load
followed by a modify and store to the same address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16493 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-23 05:31:33 +00:00
..
CBackend 'Pass' should now not be derived from by clients. Instead, they should derive 2004-09-20 04:48:05 +00:00
PowerPC Fix the last of the major PPC GEP folding deficiencies. This will allow 2004-09-23 05:31:33 +00:00
Skeleton Make sure to set the operand list 2004-09-21 17:30:54 +00:00
Sparc Use the V8/V9 shared register file description 2004-09-22 21:48:50 +00:00
SparcV8 Use the V8/V9 shared register file description 2004-09-22 21:48:50 +00:00
SparcV9 'Pass' should now not be derived from by clients. Instead, they should derive 2004-09-20 04:48:05 +00:00
X86 The real x87 floating point registers should not be allocatable. They 2004-09-21 21:22:11 +00:00
Makefile Targets are independent of each other, so compile them in parallel 2004-09-15 01:34:25 +00:00
MRegisterInfo.cpp Add getAllocatableSet() function. 2004-08-26 22:21:04 +00:00
Target.td Revamp the Register class, and allow the use of the RegisterGroup class to 2004-09-14 04:17:02 +00:00
TargetData.cpp Changes For Bug 352 2004-09-01 22:55:40 +00:00
TargetFrameInfo.cpp Remove dead methods 2004-08-12 18:37:15 +00:00
TargetInstrInfo.cpp ConstantTypeMustBeLoaded has been incorporated into SparcV9PreSelection, its 2004-07-27 21:43:38 +00:00
TargetMachine.cpp Changes For Bug 352 2004-09-01 22:55:40 +00:00
TargetMachineRegistry.cpp Implement TargetRegistrationListener 2004-07-11 06:03:21 +00:00
TargetSchedInfo.cpp