Andrew Trick 64925c55c6 Enable LSR IV Chains with sufficient heuristics. ... These heuristics are sufficient for enabling IV chains by default. Performance analysis has been done for i386, x86_64, and thumbv7. The optimization is rarely important, but can significantly speed up certain cases by eliminating spill code within the loop. Unrolled loops are prime candidates for IV chains. In many cases, the final code could still be improved with more target specific optimization following LSR. The goal of this feature is for LSR to make the best choice of induction variables. Instruction selection may not completely take advantage of this feature yet. As a result, there could be cases of slight code size increase. Code size can be worse on x86 because it doesn't support postincrement addressing. In fact, when chains are formed, you may see redundant address plus stride addition in the addressing mode. GenerateIVChains tries to compensate for the common cases. On ARM, code size increase can be mitigated by using postincrement addressing, but downstream codegen currently misses some opportunities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147826 91177308-0d34-0410-b5e6-96231b3b80d8		2012-01-10 01:45:08 +00:00
..
Analysis	Enable LSR IV Chains with sufficient heuristics.	2012-01-10 01:45:08 +00:00
Archive	Support/FileSystem: Add file_magic and move a vew clients over to it.	2011-12-13 23:17:12 +00:00
AsmParser	Removes unused field TheError from LLLexer.	2011-12-21 10:02:45 +00:00
Bitcode	Materialize functions whose basic blocks are used by global variables. Fixes	2012-01-02 07:49:53 +00:00
CodeGen	Remove the logging streamer.	2012-01-10 00:40:39 +00:00
DebugInfo	Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch	2011-12-20 02:50:00 +00:00
ExecutionEngine	Fix typo in string	2012-01-06 07:49:17 +00:00
Linker	Link symbols with different visibilities according to the rules in the	2012-01-05 23:02:01 +00:00
MC	Remove the logging streamer.	2012-01-10 00:40:39 +00:00
Object	Remove unused variables.	2011-12-25 01:20:19 +00:00
Support	revert r147542 after comments from Joerg Sonnenberger	2012-01-05 18:28:46 +00:00
TableGen	TableGen: add a comment	2011-12-22 23:16:09 +00:00
Target	Accurately model hardware alignment rounding.	2012-01-10 01:34:59 +00:00
Transforms	Enable LSR IV Chains with sufficient heuristics.	2012-01-10 01:45:08 +00:00
VMCore	generalize LLVMContext::emitError to take a twine instead of a StringRef.	2012-01-03 23:47:05 +00:00
CMakeLists.txt	Move TableGen's parser and entry point into a library	2011-10-01 16:41:13 +00:00
LLVMBuild.txt	LLVMBuild: Introduce a common section which currently has a list of the	2011-12-12 22:45:54 +00:00
Makefile