Evan Cheng 6495f63945 - More refactoring. This gets rid of all of the getOpcode calls. ... - This change also makes it possible to switch between ARM / Thumb on a per-function basis. - Fixed thumb2 routine which expand reg + arbitrary immediate. It was using using ARM so_imm logic. - Use movw and movt to do reg + imm when profitable. - Other code clean ups and minor optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77300 91177308-0d34-0410-b5e6-96231b3b80d8		2009-07-28 05:48:47 +00:00
..
Alpha
ARM	Add support for ARM Neon VREV instructions.	2009-07-26 00:39:34 +00:00
CBackend
CellSPU
CPP
Generic	Remove the IA-64 backend.	2009-07-24 00:30:09 +00:00
Mips	Remove SectionKind::Small*. This was only used on mips, and is apparently	2009-07-24 03:11:51 +00:00
MSP430
PIC16	Test case to check that separate section is created for a global variable specified with section attribute.	2009-07-27 16:20:41 +00:00
PowerPC
SPARC
SystemZ
Thumb
Thumb2	- More refactoring. This gets rid of all of the getOpcode calls.	2009-07-28 05:48:47 +00:00
X86	update testcase.	2009-07-27 15:52:58 +00:00
XCore	Add tests for handling of globals and tls on the XCore. These currently fail	2009-07-24 00:38:20 +00:00